Senior SoC Formal Verification Engineer

Job Title

Senior SoC Formal Verification Engineer

Role Summary

Work on formal verification for IP, subsystems, and SoC designs within the Solutions SoC Engineering organization. The role develops formal proof strategies, assertions, and scalable methodologies to improve design quality and accelerate verification closure.

Experience Level

Senior — the posting requests 4+ years of formal verification experience and expects seasoned expertise in formal methods and RTL analysis.

Responsibilities

Primary responsibilities include planning and executing formal verification activities and delivering verification assets and closure for complex designs.

• Develop and execute formal verification strategies for IP, subsystems, and SoCs.
• Write SystemVerilog Assertions (SVA) and formal properties; apply property checking and protocol verification.
• Perform equivalence checking and formal analysis to validate RTL and integration.
• Own verification deliverables from planning through verification closure, ensuring quality and schedule commitments.
• Architect and maintain reusable verification environments, verification IPs, methodologies, and automation.
• Create verification plans, test cases, and coverage-closure strategies; drive functional, code, toggle, assertion, and coverage closure.
• Debug RTL, testbench, integration, and system-level issues and collaborate with architecture, design, firmware, emulation, FPGA, and validation teams.
• Leverage scripting and automation, including AI-assisted workflows, to improve verification productivity.
• Contribute to methodology improvements, documentation, and engineering best practices.

Requirements

Must-have technical skills and experience for immediate contribution; preferred items listed separately.

• 4+ years of formal verification experience focusing on IP/SoC-level verification.
• Strong understanding of formal verification methodologies and abstraction techniques.
• Hands-on experience with Verilog, SystemVerilog, and SVA.
• Knowledge of temporal logic, protocol verification, and RTL analysis.
• Proven analytical and debugging skills; effective communication and cross-team collaboration.

Nice-to-have:

• Experience with formal tools such as JasperGold, VC Formal, Questa Formal, or equivalent.
• Familiarity with Arm architecture and AMBA protocols.
• Experience in CDC/RDC, low-power, security, or equivalence verification.
• Scripting and automation experience (Python, Tcl, Perl, Shell).
• Experience with AI-assisted verification and globally distributed engineering.

Education Requirements

Bachelor's or Master's degree in a relevant engineering discipline (for example, Electrical Engineering, Computer Engineering, Computer Science) is specified.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.