Senior Silicon Substrate & Packaging Manufacturing Engineer

Job Title

Senior Silicon Substrate & Packaging Manufacturing Engineer

Role Summary

Senior manufacturing engineer responsible for substrate and package assembly execution in Taiwan, owning yield, ramp, supplier performance, reliability, and manufacturing readiness from first silicon through high-volume production.

This is a high-accountability role with direct impact on time-to-volume, cost, and product availability.

Experience Level

Senior — requires 8+ years in semiconductor packaging manufacturing or product engineering.

Responsibilities

Lead packaging manufacturing strategy, NPI, and supplier performance to deliver predictable ramps and high yield.

• Define packaging manufacturing readiness criteria and yield/quality targets for EVT → DVT → PVT → HVM.
• Lead NPI builds and coordinate EVT/DVT/PVT execution with clear exit criteria.
• Own assembly yield targets, excursion response, and permanent corrective actions.
• Drive structured root-cause analysis and failure analysis across OSATs and substrate vendors.
• Establish data-driven monitoring (SPC, Cpk) and excursion response frameworks.
• Act as senior technical escalation point for OSAT and substrate suppliers; set and enforce performance expectations.
• Define ramp plans, track ramp health, and escalate supply or capability risks early.
• Lead post-ramp yield stabilization and cost-down initiatives.
• Build scalable manufacturing processes and documentation suitable for a fast-scaling startup.

Requirements

Must-have skills and experience; nice-to-have items listed after.

• 8+ years in semiconductor packaging manufacturing or product engineering.
• Proven experience ramping complex FC-BGA or advanced packages to volume.
• Deep understanding of flip-chip assembly flows and large-body substrate warpage control.
• Knowledge of underfill behavior and reliability interactions for high-current AI workloads.
• Assembly defect pareto analysis, SPC, and process capability (Cpk) experience.
• Strong track record working directly with Taiwan OSATs and substrate vendors; ability to drive supplier accountability.
• Demonstrated ownership of yield improvement programs and ability to implement validated corrective actions.
• Comfort making operational decisions under schedule pressure and driving cross-functional alignment.

Nice-to-have:

• Experience with large AI/HPC ASICs.
• Exposure to 2.5D or high-bandwidth memory packaging.
• Experience ramping first-generation silicon in a startup or fast-scaling environment.
• Fluent Mandarin and English.

Education Requirements

Not specified.

About the Company

Company: Fractile

Headquarters: London, UK

Fractile is on a mission to revolutionize AI by developing silicon, systems, and software that enable the fastest execution of advanced models at lower costs. Established in 2022, the company has rapidly expanded, fostering a collaborative culture in its London and Bristol offices. With a focus on innovation in ML/AI IC product development, Fractile combines hardware and software to deliver high-impact solutions for data center applications.