NVIDIA logo

Senior Signal and Power Integrity Engineer

NVIDIA
May 12, 2026
Full-time
On-site
Taipei, TW
Physical Design Jobs, Level - Senior

Job Title

Senior Signal and Power Integrity Engineer

Role Summary

Engineer responsible for signal and power integrity analysis for chip, package and PCB designs to support high-speed interfaces (e.g., NVLink, PCIe Gen6, DP2.1, 100GbE). Works with cross-functional hardware teams to deliver simulation, measurement correlation, PDN and SI solutions for high-speed mixed-signal systems.

Role is execution-focused and involves hands-on modeling, simulation automation, lab measurement, and interaction with package/ASIC/PCB design groups.

Experience Level

Senior β€” 5+ years of industry experience in signal and power integrity or related electrical engineering roles.

Responsibilities

Principal responsibilities include system-level SI/PI analysis, PDN design, and measurement correlation supporting high-speed interfaces.

  • Develop SI/PI solutions for complex system designs and high-speed interfaces (NVLink, PCIe, DP2.1/HDMI, CSI, USB4, 100GbE).
  • Perform system-level power integrity simulations across interposers, packages, and PCBs; design and optimize PDNs.
  • Conduct SI channel analysis to support specification development and model improvement through lab measurements.
  • Perform post-layout SI/PI model extraction and prepare results for design reviews and sign-off.
  • Automate simulations, data collection, analysis and visualization using tools such as JMP, MATLAB or similar.
  • Work cross-functionally to optimize interactions between package, PCB, ASIC and mixed-signal circuit designs.

Requirements

Key must-have technical skills and practical experience. Educational degree requirements are listed separately below.

Must-have:

  • Strong understanding of electromagnetics, transmission line theory, via behavior, SI/PI/EMI concepts and S/Y/Z parameter analysis.
  • Hands-on experience with 3D/2.5D EM and SI tools such as ANSYS HFSS, Q3D, SIwave or Cadence PowerSI.
  • PDN evaluation experience using layout extraction tools and time-domain SPICE-based simulations for power noise analysis.
  • Die power-delivery modeling experience and familiarity with tools such as CSM/Redhawk or Raptor-X.
  • Familiarity with voltage regulator and board power-supply modeling (Simplis or SPICE) and lab instruments (VNA, TDR, DSO).
  • Experience correlating measurement and simulation results; knowledge of transient simulations and eye-diagram methodology.

Nice-to-have:

  • Experience with MATLAB, Python, VBS, or C for simulation automation and data analysis.
  • Exposure to interface timing budgets, system modeling, and SI/PDN analysis flows including co-simulation techniques.
  • Familiarity with high-speed I/O design topics (clock generation, transmitter/receiver design, equalization) and high-volume manufacturing variation impacts.

Education Requirements

BS or MS in Electrical Engineering or equivalent practical experience.


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

NVIDIA logo

Date Posted: 2026-05-12