Senior Signal and Power Integrity Engineer

Job Title

Senior Signal and Power Integrity Engineer

Role Summary

Lead system and board-level signal integrity (SI) and power integrity (PI) efforts for high-speed computing products. The role drives SI/PI requirements, leads design activities and analysis, and collaborates with architecture, ASIC, package, PCB, and validation teams to ensure reliable high-speed channel performance.

Experience Level

Senior — typically requires 3+ years of SI/PI engineering experience.

Responsibilities

Primary duties include hands-on SI/PI design, analysis, and cross-functional coordination.

• Define and drive board/system SI and PDN requirements.
• Lead PCB stackup and material selection, implement design guides, perform layout reviews, and conduct post-layout analysis.
• Collaborate with Architecture, ASIC, Mixed-Signal, Package, PCB Design, and Design Validation teams to ensure SI/PI targets are met prior to tape-out and to support failure analysis.
• Develop new algorithms and methodologies to improve SI/PI modeling and simulation accuracy.
• Perform VNA and TDR measurements for model correlation and verification.
• Support application engineering and customers on SI/PI questions.

Requirements

Key technical skills and experience required. Items listed as "Nice-to-have" are additional differentiators.

• Minimum 3+ years of experience as an SI/PI engineer.
• Deep understanding of electromagnetics, including transmission line theory and via behavior.
• Proficiency with field- and circuit-level simulation tools such as HFSS, Sigrity, HSPICE, or comparable tools.
• Hands-on experience with Cadence Allegro PCB Designer and Constraints Manager.
• Understanding of high-volume manufacturing variations and their impact on channel signal integrity.
• Practical exposure to lab measurements (VNA, TDR) for model validation.
• Strong written and verbal English communication skills.

Nice-to-have:

• Familiarity with NRZ/PAM-4 signaling schemes and interface timing budgets.
• Knowledge of high-speed I/O design concepts, transmitter/receiver design, and equalization.
• PDN analysis experience, including model generation and time-domain simulation.
• Experience with Matlab, Python, or C; exposure to package design.

Education Requirements

MS or BS in Electrical Engineering (EE) or equivalent practical experience.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.