Senior Security Engineer, CPU and Platform Security Validation

Job Title

Senior Security Engineer, CPU and Platform Security Validation

Role Summary

Validate CPU, firmware, and operating-system security across pre-silicon emulation platforms and post-silicon hardware. Work with security architects and designers in France and collaborate with CPU design, firmware, software, and system validation teams to deliver measurable security coverage.

SiFive develops RISC-V compute platforms for high-performance and data-intensive applications.

Experience Level

Senior-level. The role expects 5+ years of relevant experience in CPU, SoC, firmware, platform security, or silicon validation.

Responsibilities

Primary responsibilities include:

• Translate security architecture requirements into test plans, threat models, and coverage goals for system-level validation.
• Develop tests for CPU security features (e.g., SVUKTE, TRNG, CFI, privilege separation, isolation, memory protection).
• Validate Secure Boot, measured boot, TPMs, hardware Root of Trust, secure firmware update, key handling, and debug security.
• Execute tests on emulation, FPGA, and virtual platforms; reproduce and debug issues on real chips.
• Localize failures across tests, firmware, operating systems, hardware, and architecture; drive to root cause.
• Develop automated validation tools and regression suites using scripting languages.
• Document evidence and communicate security risks, coverage, and debug results to global stakeholders.

Requirements

Core technical requirements and additional expectations.

• 5+ years of experience in CPU, SoC, firmware, platform security, or silicon validation.
• Strong CPU security knowledge, including SVUKTE, TRNG, CFI, privilege/isolation mechanisms, and hardware-assisted security.
• Hands-on experience with Secure Boot, Root of Trust, TPMs, measured boot, secure firmware, and debug/security controls.
• Strong Linux security and kernel-hardening knowledge.
• Experience developing security tests and debugging hardware/software failures.
• Proficiency in Python and C/C++; ability to read low-level code or assembly.
• Experience with pre-silicon emulation or FPGA platforms and post-silicon validation.
• Strong English communication skills and experience working across international teams.
• Right to work in Taiwan and ability to pass background/reference checks; employment contingent on export-control authorization or the company's ability to obtain required approvals.

Nice to have:

• RISC-V architecture and privilege-specification experience.
• Experience with Ghostwriter attacks, threat modeling, vulnerability analysis, fuzzing, fault injection, or side-channel testing.
• Experience with UEFI, Trusted Firmware-A, OpenSBI, U-Boot, or trusted execution environments.

Education Requirements

Bachelor's or master’s degree in computer engineering, electrical engineering, computer science, or equivalent practical experience.

About the Company

Company: SiFive

Headquarters: San Mateo, California, United States

SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.