Senior/Principal Physical Design Engineer

Job Title

Senior/Principal Physical Design Engineer

Role Summary

Responsible for end-to-end physical implementation of ASIC/SoC designs, from synthesis through sign-off, with potential full-chip ownership. Collaborate with RTL, verification, DFT, process technology, and foundry teams to optimise performance, power, and area while ensuring manufacturability and yield.

Fractile builds chips and systems focused on high-throughput AI inference.

Experience Level

Senior / Principal. Prefer 8+ years of experience in physical design for advanced technology nodes (e.g., 7nm, 5nm or below).

Responsibilities

Primary responsibilities include physical implementation, verification, and cross-functional collaboration to deliver manufacturable chips.

• Lead floorplanning, placement, clock tree synthesis, routing, and sign-off; potential full-chip execution ownership.
• Perform synthesis, static timing analysis, and timing closure to meet PPA targets.
• Plan and analyse power: power intent, IR drop, electromigration, multi-power domains, and low-power techniques.
• Ensure DRC/LVS and physical verification compliance and coordinate sign-off flows.
• Integrate DFT structures and collaborate with test engineers.
• Develop and maintain flows using EDA tools and scripting for automation.
• Interface with foundries and process engineers on manufacturability and yield optimisation.
• Provide physical-aware constraints and feedback to RTL and architecture teams.
• Apply AI-assisted tools and models to improve productivity and analysis where appropriate.

Requirements

Must-have skills and experience:

• 8+ years in physical design for advanced nodes with hands-on place-and-route and sign-off experience.
• Proven experience with P&R tools, STA, and sign-off flows (place & route, CTS, routing).
• Strong knowledge of CMOS technology, process limitations, and physical verification considerations.
• Expertise in timing closure, signal integrity, IR drop analysis, and power optimisation.
• Scripting proficiency in TCL, Perl, or Python for flow automation.
• Effective communication and teamwork in cross-functional engineering teams.
• Preferred: experience in HPC, AI accelerators, or networking chip designs and familiarity with leveraging AI tools in engineering workflows.

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.

About the Company

Company: Fractile

Headquarters: London, UK

Fractile is on a mission to revolutionize AI by developing silicon, systems, and software that enable the fastest execution of advanced models at lower costs. Established in 2022, the company has rapidly expanded, fostering a collaborative culture in its London and Bristol offices. With a focus on innovation in ML/AI IC product development, Fractile combines hardware and software to deliver high-impact solutions for data center applications.