Senior Principal Mixed-Signal Verification Engineer

Job Title

Senior Principal Mixed-Signal Verification Engineer

Role Summary

Lead top-level design verification for mixed-signal and power-management integrated circuits within the Power Management division. Focus on creating metric-driven verification plans, constrained-random tests, accurate behavioral models, and automation to ensure first-pass silicon success for products such as motor drivers, power-loss protection, point-of-load, and battery-management ICs.

This is a technical leadership role that coordinates with design, test, and customer teams to deliver high-quality power-management solutions across consumer, automotive and industrial markets.

Experience Level

Senior-level — requires 13+ years of experience in AMS design or verification of analog and power-management ICs.

Responsibilities

Deliver verification plans, tests and models; collaborate across engineering teams to resolve issues and improve verification methodology.

• Act as the verification lead and customer-facing technical owner for catalog and custom power-management ICs (motor drivers, power-loss protection, POL, battery management).
• Develop and execute metric-driven verification plans based on functional, performance, and test specifications with focus on customer use-cases.
• Create constrained-random tests and automated checkers within a top-level design verification UVM environment.
• Build high-performance, accurate RNM or Verilog-AMS models to support top-level simulation and co-simulation flows.
• Collaborate with design and test teams to diagnose and resolve issues found during verification and silicon bring-up.
• Improve and align verification methodologies with industry best practices and automate verification tasks where applicable.
• Support silicon debug and bring-up activities; communicate status and risks to stakeholders.
• Travel domestically or internationally up to 10% as required.

Requirements

Must-have technical skills and professional capabilities; preferred skills listed separately.

• 13+ years of experience in AMS design or verification of analog and power-management ICs.
• Proficiency in UVM environments including test cases, coverage models, and global checkers.
• In-depth knowledge of power-management building blocks: LDOs, amplifiers, bandgaps, DCDC regulators, oscillators, and asynchronous state machines.
• Expertise in mixed-signal simulation and debug: SPICE/Spectre, event-based simulators, co-simulation, simulation debug, and silicon debug.
• Strong problem-solving, debugging, written and verbal communication, and collaboration skills.

Nice-to-have:

• Experience with Top-Down Design Methodology.
• Proficiency in shell or Python scripting to automate verification flows.
• Familiarity with SV-UDN/EENET modeling techniques, SV Assertions, and functional coverage.
• Experience with both GUI and command-line simulation environments.
• Understanding of integrating AI into verification workflows.

Education Requirements

Master's degree in Electrical Engineering or a related field with a strong focus on mixed-signal circuit design and verification (explicitly required in the source posting).

About the Company

Company: Qorvo

Headquarters: Greensboro, NC, US

Qorvo supplies innovative semiconductor solutions that enhance connectivity and power for a variety of applications, including consumer electronics, automotive, and healthcare. With a focus on RF and power solutions, Qorvo combines technology leadership and global manufacturing to address complex challenges in fast-growing industries. Their commitment to excellence and innovation drives them to shape the future of wireless communications.