Senior Principal Interface IP Verification Engineer - Pre-Silicon

Job Title

Senior Principal Interface IP Verification Engineer - Pre-Silicon

Role Summary

Lead verification engineering for Interface IP (PCIe, CXL, DDR, Ethernet) used in AI accelerators, data centers, and SoCs. Work with architecture, RTL, firmware, and systems teams to define verification strategy and signoff criteria.

Deliver scalable, reusable UVM/SystemVerilog verification environments and debug complex RTL and protocol issues to ensure product quality and performance.

Experience Level

Senior — typically 8–10+ years of industry ASIC/SoC verification experience.

Responsibilities

Primary responsibilities include ownership of verification strategy, environment development, and cross-team collaboration.

• Own verification of complex Interface IP products (PCIe, CXL, DDR, Ethernet).
• Architect, develop, and maintain scalable UVM-based verification environments and reusable verification IP.
• Define verification strategies and test plans from spec review through product release; drive coverage closure and signoff.
• Develop constrained-random, coverage-driven tests using SystemVerilog and UVM.
• Debug RTL, protocol, and system-level issues and improve verification automation and efficiency.
• Collaborate with architects, RTL, firmware, and systems teams to identify and resolve issues early.
• Mentor and provide technical leadership to verification engineers; influence verification methodology improvements.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Deep expertise with SystemVerilog and UVM methodologies.
• Strong protocol knowledge in one or more: PCIe, CXL, DDR memory interfaces, Ethernet.
• Experience developing constrained-random and coverage-driven verification environments.
• Experience with industry-standard simulators (e.g., VCS, ModelSim) and verification tool flows.
• Strong RTL and protocol debugging and problem-solving skills.
• Ability to independently drive technical initiatives and collaborate across geographically distributed teams.

Preferred:

• Verification IP development experience, assertion-based verification, and formal methods.
• Familiarity with modern SoC architectures and high-speed communication interfaces.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) is specified in the posting, with a requirement of approximately 8–10+ years of direct industry experience in ASIC/SoC verification.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.