Senior Principal IC Design Engineer, AI/HPC

Job Title

Senior Principal IC Design Engineer, AI/HPC

Role Summary

Lead digital IC architecture, micro-architecture and RTL development for AI/HPC SOC programs within Marvell’s Central Engineering group. Work across cross-functional teams to define ASIC/block specifications, drive implementation, and support physical design and verification activities. The role includes technical leadership and mentorship for a small digital team focused on high-density SRAM compilers and performance-driven designs.

Experience Level

Senior-level. The posting specifies 15+ years of related experience for candidates with a Bachelor's degree, or 13+ years with a Master's or PhD.

Responsibilities

Primary responsibilities include architecture, RTL delivery, cross-team coordination, and mentoring.

• Investigate, scope and plan new AI/HPC SOC programs.
• Define ASIC and block architecture, micro-architecture and register specifications; write and drive specification documents.
• Conduct architecture and design requirement reviews with customers, cross-functional teams, and IP vendors.
• Lead RTL implementation using coding best practices and review code quality.
• Collaborate with physical design on floorplanning, power analysis, synthesis and timing signoff.
• Work with verification on pre-silicon tasks: review verification plans, coverage analysis, full-chip simulation, performance analysis and debug.
• Develop and evaluate design and verification methodologies; improve existing flows.
• Provide mentorship to junior team members and technical leadership to the team.

Requirements

Must-have technical skills are listed first; desirable skills follow.

• Must-have: Proven experience creating architectural and micro-architectural specifications.
• Must-have: Verilog/SystemVerilog RTL coding experience, including SystemVerilog Assertions (SVA).
• Must-have: Demonstrated leadership and hands-on experience across all stages of the ASIC design flow (specification, architecture, implementation).
• Must-have: Experience interfacing with physical design teams on floorplanning, power, synthesis and timing closure.
• Must-have: Experience with verification activities: test plans, coverage, full-chip simulation, performance analysis and debug.
• Must-have: Scripting proficiency in Perl, Python and/or shell scripting.
• Nice-to-have: Domain expertise in computer architecture, embedded systems architecture, networking or machine learning accelerators.
• Nice-to-have: Experience working with SRAM memory compilers or similar dense-memory IP.

Education Requirements

Bachelor's degree in Computer Science, Electrical Engineering or a related field with 15+ years of related professional experience; or Master’s degree or PhD in Computer Science, Electrical Engineering or a related field with 13+ years of experience.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.