Senior Principal HW Design Engineer — Emulation Acceleration System Platform

Job Title

Senior Principal HW Design Engineer — Emulation Acceleration System Platform

Role Summary

Hands-on principal hardware architect and engineer for Cadence's emulation-acceleration system platform. The role is based in the San Jose headquarters and reports to the Sr. Engineering Group Director of R&D.

Primary mission: architect system platforms, design boards and schematics, work with PCB/layout engineers on signal integrity and manufacturability, lead bring-up and sustainment of production hardware.

Experience Level

Senior — principal-level technical leader. Typical experience: 10+ years of board-level hardware and system development; see Education Requirements for degree-based minimums.

Responsibilities

Accountable for end-to-end hardware platform delivery, technical leadership, and process quality.

• Architect, design, bring-up, and sustain emulation-acceleration hardware platforms and system-level boards.
• Create schematics and work with PCB/layout engineers to implement high-speed designs and ensure signal/power integrity.
• Lead design reviews, establish and maintain hardware engineering standards, procedures, documentation, and performance metrics.
• Drive manufacturability and quality mitigation efforts with cross-functional teams and vendors.
• Mentor and provide technical guidance to junior hardware engineers; lead process-improvement initiatives.
• Coordinate system-level integration, testing, and production bring-up activities.

Requirements

Must-have technical skills and experience; listed concisely. Education degree requirements are summarized separately under Education Requirements.

• Minimum of 10 years developing board-level hardware and systems.
• Proven track record taking hardware systems from concept to production.
• Experience in system architecture, signal integrity (SI), power integrity (PI), power design, and high-speed interfaces.
• Experience using schematic-capture tools and collaborating with PCB/layout engineers on layout and SI issues.
• Demonstrated leadership and ability to guide junior HW engineers; strong written and verbal communication for plans and reports.
• Ability to operate independently, prioritize multiple tasks, and contribute on cross-functional teams.
• Nice-to-have: familiarity with volume manufacturing methods and processes.

Education Requirements

Bachelor's degree in Electrical Engineering with a minimum of 12 years of relevant experience, OR Master's degree with a minimum of 10 years of relevant experience, OR PhD with a minimum of 8 years of relevant experience. Field: Electrical Engineering. (These degree-based minimums are stated in the source.)

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.