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Senior Principal Engineer, Verification

Marvell Technology
May 09, 2026
Full-time
On-site
Hyderabad, Telangana, India
Verification Jobs, Level - Senior

Job Title

Senior Principal Engineer, Verification

Role Summary

Lead verification engineering for SoC projects within Marvell's Data Centre Engineering — Compute & Storage group. Responsible for planning, executing, and delivering end-to-end design verification for ARM-based SoCs and coordinating verification activities across IP, subsystem, and SoC teams.

Primary mission: ensure functional correctness and performance of silicon through pre-silicon DV, sign-off activities, and support for post-silicon bring-up.

Experience Level

Senior — requires 18+ years of relevant verification experience.

Responsibilities

Key responsibilities include:

  • Lead end-to-end SoC DV execution and sign-off across IP, subsystem, and SoC levels.
  • Define and improve DV processes to increase efficiency and quality.
  • Collaborate with IP, subsystem, and SoC teams on test-plan creation, testbench architecture, and milestone reviews.
  • Manage test plan development, execution, debug, coverage closure, and gate-level simulations.
  • Coordinate with Architecture, Chip Lead, Emulation, and Program Management to drive SoC-level DV execution.
  • Partner with silicon bring-up and firmware teams to support post-silicon validation and bring-up activities.
  • Own and debug simulation failures; identify and resolve root causes.
  • Architect and implement simulation testbenches using UVM and C.
  • Develop and execute verification test plans to validate design correctness and performance.

Requirements

Must-have technical skills and experience:

  • Proven experience in SoC/subsystem/IP level verification of ARM-based SoCs, including familiarity with ARM boot sequences.
  • Knowledge of ARM architecture and AMBA bus standards (AXI-4, CHI, ACE).
  • Experience with industry-standard interfaces such as DDR, HBM, PCIe, Ethernet, and USB.
  • Proficient in coding UVM testbenches at SOC/subsystem/block level: BFMs, scoreboards, monitors, and verification components.
  • Proficient in writing and debugging tests in UVM and C.
  • Experience with assertion-based formal verification tools.
  • Proficient in scripting (tcl, Perl) and familiar with hardware emulation support.
  • Experience with version control tools (CVS, SVN, Git).
  • Experience leading technical teams or core technical leads on verification projects.
  • Exposure to major verification toolchains (Cadence, Synopsys, Mentor) and ARM verification tools.

Nice-to-have:

  • Familiarity with TLMs in SystemC.

Education Requirements

Requires a Bachelor’s or Master’s degree; the posting specifies 18+ years of relevant experience. Fields of study are not specified and no explicit equivalent-experience language is provided.


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-05-08