Senior Principal Engineer, RTL ASIC Design

Job Title

Senior Principal Engineer, RTL ASIC Design

Role Summary

Lead the development and integration of design methodologies, automation, and AI/ML tools for RTL and ASIC design within the Custom and Compute Solutions business unit. Drive workflow improvements across front-end and back-end flows to enable advanced SoC development and production ramp.

Work cross-functionally with design, verification, CAD/EDA teams, vendors, and research partners to deploy methodologies, automate tasks, and scale engineering productivity.

Experience Level

Senior — requires 18+ years of experience in design automation, methodology development, or AI/ML applications in engineering.

Responsibilities

Primary responsibilities include methodology development, AI integration, toolchain management, collaboration, and innovation to improve ASIC design productivity.

• Design and implement robust workflows for design, verification, and automation across RTL-to-GDSII flows.
• Establish best practices, standards, and documentation for methodology adoption and scalability.
• Apply machine learning and AI techniques to optimize design flows, resource allocation, and decision support.
• Develop predictive models and intelligent tools to assist engineering teams.
• Integrate methodologies into existing CAD/EDA toolchains and ensure tool compatibility.
• Automate repetitive tasks using scripting and programming languages (Python, TCL, Shell, C++).
• Provide training, support, and deployment guidance to design, verification, and CAD teams.
• Collaborate with vendors and research partners for tool evaluation and innovation; prototype new approaches to enhance productivity.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• 18+ years of relevant industry experience in design automation, methodology development, or AI/ML for engineering.
• Strong programming and scripting skills: Python, TCL, Shell, C++.
• Hands-on experience with EDA tools and ASIC design flows (both front-end and back-end).
• Practical understanding of machine learning concepts and their application to engineering problems.
• Excellent problem-solving, communication, and collaboration skills.

Nice-to-have:

• Experience with deep learning frameworks (TensorFlow, PyTorch).
• Knowledge of semiconductor design processes including verification and DFM.
• Familiarity with cloud computing, distributed systems, data analytics, and visualization tools.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.