Job Title
Senior Principal Engineer, RTL ASIC Design
Role Summary
Lead RTL and microarchitecture design for complex SoCs within the Custom and Compute Solutions business unit. Define subsystem architecture, register specifications, and implement RTL while ensuring performance, power, security, and silicon readiness.
Collaborate with system and chip architects, physical design, verification, firmware, IP vendors, and customers to deliver industrial-quality SoC implementations.
Experience Level
Senior — technical leadership role. Posting specifies Bachelor's/Master's with 18+ years of related experience, or PhD with 16+ years of related experience.
Responsibilities
Core responsibilities include:
- Define subsystem architecture, micro-architecture, and register specifications for complex SoCs.
- Produce and review specifications and implement RTL using coding best practices.
- Collaborate with system and chip architects, IP vendors, and customers on architecture, requirements, and design trade-offs.
- Coordinate with physical design on floorplanning, power analysis, synthesis, and timing closure.
- Support pre-silicon verification: review test plans, coverage, full-chip simulation, emulation, and debug.
- Perform performance, power, and architectural trade-off analysis.
- Develop or evaluate design and verification methodology and provide technical guidance to teams.
Requirements
Must-have technical skills and experience:
- Extensive SoC architecture and hardware microarchitecture experience.
- Hands-on RTL development and proficiency in HDLs and scripting languages.
- Experience with ARM-based SoC architectures, compute, memory management, and virtualization.
- Familiarity with high-speed interconnects and interfaces (PCIe, CXL, DDR) and system caches.
- Knowledge of peripherals, QoS, power management, and security-related design considerations.
- Experience with performance analysis, simulation, modeling, and VLSI design flow.
- Strong communication and collaboration skills for global, cross-functional teams.
- Experience working with third-party IP vendors and defining customization requirements.
Nice-to-have:
- Experience with AI accelerators, DSPs, and advanced security features.
- Past roles owning specifications or working directly with strategic customers.
Education Requirements
Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related field with 18+ years of related professional experience; or PhD in Computer Science, Electrical Engineering, or a related field with 16+ years of related professional experience.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-05-09