Senior Principal Engineer, Micro-architecture and RTL

Job Title

Senior Principal Engineer, Micro-architecture and RTL

Role Summary

Member of Central Engineering's connectivity business group responsible for designing, implementing, verifying, and documenting micro-architecture and RTL for complex power-management and related integrated circuits. The role leads end-to-end block development, interfaces with system and chip architects, and mentors other digital design engineers.

Experience Level

Senior. Typical experience guidance provided by employer: Bachelor's degree +15+ years; Master’s degree +10–12 years; PhD +8–10 years of relevant experience.

Responsibilities

Accountable for architecture, RTL, verification coordination, and delivery of reusable IP blocks.

• Design, develop, implement, verify, and document micro-architecture and SystemVerilog RTL for complex power-management or related ASIC blocks.
• Author comprehensive block micro-architecture and register specifications.
• Collaborate with system and chip architects to produce industrial-quality implementations and timing specifications.
• Participate in full design lifecycle: specification, RTL coding, verification planning and review, lab bring-up, and maintenance of delivered blocks and IP.
• Work with design verification teams to review test plans and verify execution; support silicon bring-up and block-level lab testing.
• Schedule and lead cross-functional design and design-review meetings; evaluate and improve design and verification methodologies.
• Supervise, mentor, and provide technical leadership to other digital design engineers.

Requirements

Key technical skills and experience required or strongly preferred.

• Must-have: SystemVerilog RTL coding including SystemVerilog Assertions (SVA).
• Must-have: Universal Verification Methodology (UVM) experience and verification planning.
• Must-have: Experience creating micro-architectural specifications from standards or architectural specs.
• Must-have: Experience building modular, reusable RTL design components and IP.
• Must-have: Experience with embedded micro-controller systems and practical lab bring-up of blocks on silicon.
• Must-have: Demonstrated project leadership, ability to multi-task, and adapt in a fast-changing environment.
• Nice-to-have: Domain experience with Ethernet, PCIe, CXL, or power-conversion systems.

Education Requirements

Employer specifies degree plus experience combinations: Bachelor's degree in Computer Science, Electrical Engineering, or related fields with 15+ years of related professional experience; Master's degree in those fields with ~10–12 years of experience; PhD in those fields with ~8–10 years of experience. Fields listed: Computer Science, Electrical Engineering, or related technical fields.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.