Senior Principal Engineer, Emulation

Job Title

Senior Principal Engineer, Emulation

Role Summary

Lead the Emulation Center of Excellence for Custom Compute and Storage (CCS) SoC projects. Define emulation strategy, enable vendor platforms, and drive emulation-based verification, pre-silicon validation and post-silicon readiness for large SoC products.

Experience Level

Senior-level. The posting specifies degree-based experience: Bachelor's +17 years, or Master's/PhD +15 years (see Education Requirements).

Responsibilities

Primary responsibilities focus on emulation strategy, platform enablement, verification execution, and tooling to accelerate RTL and software readiness.

• Define emulation strategy and platform requirements across CCS products.
• Develop and execute emulation test plans on platforms such as Veloce, Zebu and Palladium.
• Specify emulation hardware requirements, transactors, speed-bridges and related collaterals.
• Collaborate with vendor application engineers to resolve hardware/software issues and enable vendor platforms.
• Provide guidance to pre-silicon validation teams to optimize emulation environments and test suites.
• Design and deliver HW/SW capabilities and automation to improve emulation usability, throughput and equipment utilization.

Requirements

Must-have technical skills and domain experience required for effective performance in the role.

• Extensive experience with emulation platforms and building complex SoC emulation models (vendors such as Synopsys, Cadence, Siemens).
• Hands-on experience with emulation platforms including Veloce, Zebu, Palladium or equivalent systems.
• Deep knowledge of processor architecture, SoC components, interconnect buses and IO protocols (PCIe, CXL, Ethernet) and memory interfaces (DDR, HBM).
• Proven verification and debug experience using emulation platforms for large SoC products.
• Strong scripting and automation skills (Perl, Python, Tcl, UNIX Shell) for test automation, flows and tooling.
• Experience working with vendors and cross-functional stakeholders to define requirements and drive issue resolution.
• Experience developing HW/SW tools, transactors, and flows to accelerate RTL validation and software bring-up.
• Nice-to-have: prior work on FPGA/acceleration models, speed-bridge development, or post-silicon validation support.

Education Requirements

Bachelor's degree in Computer Science, Electrical Engineering or related fields with 17+ years of related professional experience; or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 15+ years of related experience.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.