Senior Principal Engineer, Digital ASIC Design / Manager

Job Title

Senior Principal Engineer, Digital ASIC Design / Manager

Role Summary

Lead and manage digital ASIC design projects for mixed-signal integrated circuits at the San Diego facility. Responsible for architecture, RTL development, synthesis, static timing analysis, verification, and ensuring physical design integrity through place-and-route.

Work with cross-functional teams, hire and supervise staff or contractors, plan project resources and schedules, and drive designs from concept to production.

Experience Level

Senior — requires extensive industry experience. The posting specifies about 15 years of Digital ASIC design experience.

Responsibilities

Primary responsibilities include technical leadership, project management, and hands-on digital design and verification.

• Lead digital design projects from inception to production for mixed-signal ICs.
• Hire, manage, and mentor full-time employees and contractors supporting projects.
• Architect and design digital control logic interfacing with I/O and analog functions.
• Perform RTL design, synthesis, and static timing analysis for digital control logic.
• Develop project resource plans, schedules, and track milestones.
• Ensure physical-layer design integrity during place-and-route (PNR).
• Develop test plans and oversee digital verification and coverage analysis.
• Support mixed-signal verification and integration activities.
• Perform scan insertion and work with MBIST and LBIST implementations.

Requirements

Must-have technical skills and experience; a few preferred items are noted.

• Must-have: ~15 years of industry experience in digital ASIC design with complex multi-million gate architectures.
• Must-have: Proven technical leadership and people-management experience (hiring and managing engineers/contractors).
• Must-have: Strong RTL design skills in Verilog/SystemVerilog; experience with synthesis and static timing analysis.
• Must-have: Knowledge of DFT, scan insertion, MBIST and LBIST, and production test methods.
• Must-have: Experience with mixed-signal design methodology and supporting mixed-signal verification.
• Must-have: Ability to drive cross-functional design reviews and requirements development.
• Nice-to-have: System-level experience making architectural tradeoffs for software and hardware integration; experience ensuring PNR physical-layer integrity.
• Nice-to-have: Experience working with geographically distributed teams and coordinating across functions.
• Strong verbal and written communication skills.

Education Requirements

BS or MS degree in Electrical Engineering (specified). No other degrees, fields, certifications, or equivalent-experience language were provided in the source.

About the Company

Company: Kyocera International

Headquarters: San Diego, CA, United States

U.S. subsidiary of Kyocera Corporation, providing engineering, manufacturing and distribution of electronic components, semiconductors, ceramic products and document solutions for industrial and commercial customers.