Senior Principal Design Verification Engineer

Job Title

Senior Principal Design Verification Engineer

Role Summary

Lead verification strategy and execution for complex System-on-Chip (SoC) designs within a verification team. Responsible for driving DV closure, defining methodology and coverage goals, and mentoring verification engineers while collaborating with design teams.

Experience Level

Senior — requires 12+ years of hands-on experience in SoC/IP design verification.

Responsibilities

The role combines technical leadership with hands-on verification execution across SoC and IP scopes.

• Define and own SoC-level and IP-level verification strategy, methodology, and coverage goals.
• Drive design verification closure across multiple IPs and subsystems, ensuring compliance with functional safety and security requirements.
• Develop and improve verification flows for reuse and efficiency; lead regression and closure activities.
• Design, develop, debug, and run UVM-based verification environments for RTL, power-aware RTL, gate-level, FPGA prototypes, and emulation platforms.
• Create and maintain test cases, constrained-random stimulus, assertions, and functional coverage models; analyze coverage to ensure completeness.
• Mentor and coach junior and senior DV engineers; collaborate with cross-functional teams to resolve issues and achieve sign-off.

Requirements

Must-have technical skills and domain experience are listed below; following items are preferred but not required.

• Must-have: 12+ years of SoC/IP design verification experience with proven tape-out experience on multiple SoCs.
• Must-have: Strong expertise in SoC-level verification and ARM-based microcontroller verification.
• Must-have: Proficiency in SystemVerilog, UVM, constrained-random verification, SystemVerilog Assertions (SVA), and functional coverage.
• Must-have: Hands-on experience with industry EDA simulators (for example, Synopsys VCS, Cadence Xcelium, Mentor Questa).
• Must-have: Experience with power-aware verification and UPF-based low-power validation; exposure to gate-level simulations and power-aware simulations.
• Nice-to-have: Verification experience with interfaces such as SPI, I2C, UART, USB, PCIe, Ethernet, eSPI.
• Nice-to-have: Experience with Flash memory, security IPs (crypto engines, security subsystems), and common analog IPs (ADC, DAC, PLLs).
• Soft skills: Strong communication, collaboration, ability to work in a fast-paced environment, and mentorship capability.

Education Requirements

Not specified.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.