Senior Principal Design Engineer
Lead ownership of HBM PHY signal integrity (SI) and power integrity (PI) design efforts. The role drives technical decisions, coordinates SI/PI deliverables across the program, conducts gate-level design reviews, and reviews customer interposer and package designs.
Senior. Years of experience not specified.
Primary responsibilities include:
Specific required skills, years of experience, and technical qualifications are not stated in the posting.
Not specified.
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
