Senior Principal Design Engineer
Work on Cadence's Flagship Emulation and Prototyping product line to design and productize protocol solutions (PCIe, advanced Ethernet, and similar) used in modern IC design and verification.
Individual contributor role focused on RTL design, verification, FPGA and board design/debug, system integration, and documentation for protocol products.
Senior β expected to have significant prior experience; typically 7+ years in protocol or RTL design and verification.
Primary responsibilities include design, verification, and productization of protocol IP and system-level integration.
Must-have technical skills and professional attributes; nice-to-have items listed separately.
Requires MSEE (Master of Science in Electrical Engineering) or equivalent; equivalent practical experience is acceptable.
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
