Senior Principal ASIC FPGA Engineer

Job Title

Senior Principal ASIC FPGA Engineer

Role Summary

Lead architect and technical authority for ASIC and FPGA developments within a systems engineering organization. The role defines architecture, performs system simulation and detailed design, creates verification and test plans, evaluates vendor/foundry capabilities, and provides technical leadership across proposals and program execution.

Work is performed on defense-related products in a cross-functional engineering environment; responsibilities include technical subcontract oversight and participation in integrated product teams.

Experience Level

Senior-level. Requires substantial prior ASIC/FPGA engineering and technical leadership experience; hiring guidance specifies a minimum of 10 years relevant experience with a Bachelor’s degree or 8 years with a Master’s degree.

Responsibilities

Primary responsibilities include:

• Define architecture, module interfaces, and detailed design approach for ASIC and/or FPGA developments.
• Create and execute system simulations, synthesis, place-and-route flows, timing and power analysis.
• Develop verification strategies, test plans and validate test results; analyze performance against requirements.
• Evaluate vendor capabilities, foundry technologies, device libraries and simulation tools to support product development.
• Lead or contribute to technical subcontract management, including SOW development, proposal evaluation, and technical oversight.
• Establish technical approach on large proposals and participate in multi-division integrated product teams.
• Support process improvement and maintain organizational ASIC/FPGA development processes and standards.
• Mentor and may supervise lower-level engineers; provide technical consultation to management and customers.

Requirements

Key requirements and qualifications.

• Must-have: Department of Defense Secret security clearance required at time of hire; U.S. citizenship (position requires eligibility for classified access).
• Must-have: Demonstrated, substantial experience with ASIC/FPGA engineering principles, including design, verification, synthesis, place-and-route, timing and power analysis.
• Must-have: Proven ability to create test/simulation plans, analyze verification results, and select components based on specifications and reliability.
• Must-have: Strong technical leadership skills: proposal technical lead experience, subcontract technical oversight, project leadership (SPI/CPI, Earned Value, CAM), and scope management.
• Must-have: Excellent written and verbal communication skills and ability to present technical issues and corrective actions to stakeholders.
• Nice-to-have: Experience reviewing foundry/vendor technologies and device libraries; prior Deputy Program Manager Engineering (DPME) experience; familiarity with applying AI for process improvement.
• Tools/Software: Proficiency with ASIC/FPGA tool flows and common engineering tools; Microsoft Office proficiency.

Education Requirements

Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering, or Mathematics field plus a minimum of 10 years relevant experience; OR Master’s degree in a related field plus a minimum of 8 years relevant experience. (Equivalent practical experience may be considered where explicitly permitted by the employer.)

About the Company

Company: General Dynamics Mission Systems

Headquarters: Fairfax, Virginia, United States

Develops high-technology solutions, products and services for defense and scientific customers worldwide, including secure communications, mission systems, sensors, and ISR/C4ISR capabilities. Employs engineering, integration and program teams to support military and government missions.