Senior Power Integrity Methodology CAD Engineer
Design and deliver power-integrity (EMIR) methodology, flows, and CAD tool integrations for rail analysis and signoff across GPU/AI chip projects. The role sits on the physical design/methodology team and focuses on analysis workflows, automation, and convergence of signoff-quality IR analysis.
Work involves creating and maintaining tool flows, collaborating with hardware and design teams, and improving methodology for early-cycle optimization.
Senior β requires substantial hands-on methodology development experience; posting specifies a minimum of 5+ years in EMIR flow methodology development and support.
The primary responsibilities include developing methodology, implementing flows, and supporting EMIR signoff across projects.
Must-have technical skills and experience for successful performance in the role.
Nice-to-have:
Master's degree in Electrical Engineering or a related field, or equivalent practical experience.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
