Senior Physical Design Engineer

Job Title

Senior Physical Design Engineer

Role Summary

Lead physical design implementation for complex, low-power ASICs. Work with the ASIC implementation team to drive synthesis, floorplanning, place-and-route, timing closure, power integrity and physical verification to production sign-off.

This role can be based in Richardson, TX (onsite/hybrid) or remote; it is a contract engagement (6+ months, possible extension).

Experience Level

Senior — requires experienced engineer; posting specifies 5+ years of related industry experience.

Responsibilities

Primary responsibilities include hands-on physical design and flow leadership, collaboration across implementation disciplines, and driving project milestones and tool usage.

• Architect system-level physical implementation requirements and champion project needs, schedule and budgets.
• Implement physical design for complex, low-power ASICs: physically aware synthesis, DFT, floorplan, place-and-route, and sign-off.
• Perform static timing analysis, parasitic extraction, IR drop and electromigration analysis, power analysis, and physical verification.
• Troubleshoot and improve digital design flows and resolve issues in Cadence Genus, Innovus, and Tempus.
• Collaborate with synthesis, timing, RTL, DFT and verification teams to meet timing, power and reliability goals.
• Plan and coordinate tools, team effort and milestones to ensure project delivery.

Requirements

Must-have technical skills, compliance and practical experience required for the role.

• 5+ years hands-on experience in high-reliability, low-power VLSI physical design (degree details listed under Education Requirements).
• 5+ years practical experience with Cadence Genus, Innovus and Tempus.
• Expert user of physical design, synthesis and timing-analysis flows and tools.
• Skilled with Verilog/VHDL RTL and able to modify RTL to aid timing or power closure.
• Proven experience with chip-level floorplanning, synthesis, place-and-route optimization, parasitic extraction, STA, low-power intent (UPF/CPF), power/IR drop analysis, EM analysis, and physical sign-off.
• Basic programming proficiency in Perl, C and TCL for flow automation and scripts.
• Strong understanding of reliability, test and power trade-offs in physical design.
• ITAR compliance approval required; US Citizen or US Permanent Resident required.
• Nice-to-have: familiarity with MIPI, I2S, CAN protocols.

Education Requirements

Bachelor of Science or Master of Science in Electrical Engineering (BSEE/MSEE) is specified; posting indicates 5+ years of related industry experience. No mention of alternative degree fields or explicit equivalent-experience language beyond the years of experience requirement.

About the Company

Company: Chelsea Search Group

Chelsea Search Group is a technical recruiting firm that connects engineering and technology professionals with employers, specializing in semiconductor, SoC, embedded systems, and related hardware/software roles.