Senior Physical Design Engineer, Annapurna Labs

Job Title

Senior Physical Design Engineer, Annapurna Labs

Role Summary

Design and optimize custom SoCs and datacenter accelerators for AWS Machine Learning servers. The role focuses on RTL-to-GDSII physical implementation, performance/power/area tradeoffs, and production sign-off for IO/core subsystems.

Work within the Cloud-Scale Machine Learning Acceleration team to drive high-quality physical design, methodology development, and integration of third-party IP at datacenter scale.

Experience Level

Senior-level. Typically requires 6+ years of hands-on ASIC physical design experience focused on RTL-to-GDSII implementation and sign-off activities.

Responsibilities

The core responsibilities include:

• Collaborate with RTL/architecture teams to evaluate architectural feasibility and power-performance-area tradeoffs.
• Drive physical implementation for IO/core subsystems and blocks: synthesis, floorplanning, bus/pin planning, placement & routing, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO, and sign-off.
• Develop and improve physical design methodologies and flows.
• Evaluate and integrate 3rd-party IP; specify and drive IP requirements in the physical domain.
• Work closely with other physical design engineers and cross-functional teams to ensure successful tapeout and integration.

Requirements

Must-have technical skills and experience:

• Hands-on RTL-to-GDSII physical implementation experience on modern process nodes (examples: 7nm, 14/16nm, 20nm, 28nm) using industry EDA tools (Cadence, Mentor, Synopsys, or similar).
• Proven experience across synthesis, equivalency verification, floorplanning, bus/pin planning, place & route, power/clock distribution, congestion and timing closure, IR drop analysis, physical verification, ECO, and sign-off.
• Deep understanding of sign-off activities including timing, IR/EM, and physical verification.
• Experience scripting and automating flows with Python, Perl, Bash, or PowerShell.
• Strong collaboration skills; ability to work in a fast-moving, startup-like engineering team.

Nice-to-have / preferred:

• Experience mentoring or leading junior engineers.
• Expertise developing CAD/EDA flows for synthesis, formal verification, floorplanning, place & route, and sign-off.
• Experience integrating IP and driving IP requirements (several years preferred).
• Thorough knowledge of device physics, custom/semi-custom implementation techniques, and subsystem-level challenges (DDR, PCIe, fabrics, etc.).
• Experience extracting design parameters, QOR metrics, and analyzing trends.

Education Requirements

Bachelor's plus 8 years, or Master’s plus 6 years in Electrical Engineering or Computer Science (BS + 8 yrs or MS + 6 yrs in EE/CS) as listed in the role's basic qualifications.

About the Company

Company: KGS

KGS is a government and commercial contracting firm that provides engineering, technical, and staffing solutions, often supporting aerospace, defense, and IT projects for federal and industry customers.