Senior Physical Design Engineer

Job Title

Senior Physical Design Engineer

Role Summary

Join Microsoft Compute Silicon & Manufacturing Engineering within SCHIE to lead physical implementation of large SoC blocks for cloud infrastructure chips (e.g., Azure Cobalt). The role focuses on end-to-end physical design execution, methodology optimization, and cross-team coordination to deliver production silicon.

Experience Level

Senior - preferred 7+ years of semiconductor design experience (posting guidance).

Responsibilities

Key responsibilities include:

• Drive end-to-end physical implementation from synthesis through place-and-route and complete all signoff stages (timing, physical verification, EMIR, formal equivalence, low-power verification).
• Design and implement clock construction and clock-tree synthesis (CTS).
• Lead methodology exploration to optimize SOC blocks for clocking, power, and performance.
• Implement RTL-to-GDS flows and own PD execution for medium-to-large SoC blocks.
• Coordinate with CAD, RTL/design/DFT, architecture, power & performance, technology teams, and external partners.
• Influence and improve design tools, flows, and PD methodologies using a data-driven approach.
• Communicate project status, plans, and technical tradeoffs to stakeholders.
• Provide hands-on technical ownership as an individual contributor across Physical Design domains.
• Demonstrate collaboration, adaptability, and inclusion while delivering results.

Requirements

Must-have technical skills and compliance requirements:

• Practical experience executing physical design flows: synthesis, floorplanning, placement, routing, extraction, timing closure, and physical verification.
• Deep expertise in clock construction and CTS for high-speed designs.
• Experience with signoff flows (timing signoff, EMIR, formal equivalence, low-power verification).
• Ability to coordinate across CAD, PD methodology, RTL, architecture, and cross-functional teams.
• Ability to meet Microsoft security screening requirements and export-control eligibility checks.

Nice-to-have:

• Production silicon tape-out experience in advanced foundry process nodes.
• Low-power SOC design methodology and strong PPA trade-off understanding.
• Experience partnering with PD flow/CAD teams to resolve tooling and methodology issues.
• Strong problem-solving, data analysis, and cross-team communication skills.

Education Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field + 1+ year technical engineering experience; OR Master’s in those fields + 4+ years; OR Bachelor’s in those fields + 5+ years; OR equivalent practical experience. Posting also notes BS/MS in EE/CE as preferred.

About the Company

Company: Microsoft

Headquarters: Redmond, Washington, United States

Microsoft is a global technology company that develops and sells software, services, devices, and solutions. Known for its Windows operating system, Office suite, and Azure cloud platform, Microsoft aims to empower individuals and organizations around the world to achieve more. The company fosters a culture of innovation and inclusion, focusing on delivering trusted experiences to customers and partners globally.