Senior Physical Design Engineer

Job Title

Senior Physical Design Engineer

Role Summary

Lead physical implementation of complex, low-power ASIC designs across synthesis, place-and-route, timing closure and sign-off. Work with the ASIC design implementation team to define and deliver system-level and implementation-level requirements.

Position is a contract role (6+ months, possible extension). Richardson, TX office (onsite/hybrid) with remote work possible. US Citizen or US Permanent Resident required; ITAR compliance approval required.

Experience Level

Senior — typically 5+ years of industry experience in physical/VLSI design and implementation.

Responsibilities

Primary responsibilities include technical leadership of physical design activities and maintaining/advancing the digital implementation flow.

• Define and architect system and implementation requirements for physical design.
• Collaborate with ASIC implementation team to achieve timing, power and reliability targets.
• Develop, leverage and enhance digital design flows and debug Cadence Genus/Innovus/Tempus issues.
• Plan and coordinate tools, budgets and team effort to meet project milestones.
• Perform physically aware logic synthesis, DFT integration, floorplanning, placement and routing.
• Execute static timing analysis, parasitic extraction, power analysis (IR drop) and electromigration analysis.
• Drive physical verification and sign-off for production designs.

Requirements

Must-have technical skills, security and eligibility requirements.

• US Citizen or US Permanent Resident; ITAR compliance approval required.
• 5+ years hands-on experience in high-reliability, low-power VLSI physical design and implementation.
• Extensive hands-on experience with Cadence digital implementation and timing tools (Genus, Innovus, Tempus).
• Production-proven experience with floorplanning, synthesis, place-and-route optimization, parasitic extraction and static timing analysis.
• Experience with low-power design flows and intent (UPF/CPF), power analysis, IR drop and electromigration mitigation.
• Proficient with RTL (Verilog/VHDL) and able to modify RTL for timing or power closure.
• Basic programming proficiency in Perl, C and TCL for flow automation and scripts.

Nice-to-have:

• Familiarity with MIPI, I2S or CAN protocols.

Education Requirements

Required: BSEE or MSEE (Electrical Engineering) is specified. The posting also requires 5+ years of relevant industry experience and ITAR compliance approval.

About the Company

Company: Chelsea Search Group

Chelsea Search Group is a technical recruiting firm that connects engineering and technology professionals with employers, specializing in semiconductor, SoC, embedded systems, and related hardware/software roles.