Senior Physical Design Engineer
QualcommJob Title
Senior Physical Design Engineer
Role Summary
Member of the GPU ASICs physical design team responsible for implementing and optimizing high-performance GPU cores. Work includes floorplanning, place-and-route, timing closure, power optimization and physical verification to meet PPA targets.
Experience Level
Senior-level. Typically requires several years of hands-on physical design/implementation experience (see Education Requirements for degree/experience combinations).
Responsibilities
Key responsibilities include delivering block-level physical implementation and working with cross-functional teams to meet performance, power and area targets.
- Perform floor-planning, placement & routing (PnR), clock tree synthesis (CTS) and timing closure for high-frequency GPU cores.
- Implement and optimize power distribution network (PDN), and perform power optimization and signoff-level physical verification (DRC/LVS).
- Drive timing convergence using advanced STA methodologies for datapath-intensive blocks.
- Use Synopsys ICC2 / Cadence Innovus for PnR and tools such as Tempus / PTSI for timing signoff.
- Collaborate with design, DFT and verification teams to resolve constraints, verification, and physical design issues.
- Create and maintain automation scripts (Tcl/Perl) to support implementation flows.
- Manage deliverables and schedules as part of a small engineering team.
Requirements
Required skills and experience for successful performance in this role.
- Must-have: Several years of physical implementation experience for PPA-critical blocks and timing-convergent designs.
- Must-have: Strong expertise in timing closure and advanced static timing analysis for high-frequency datapaths.
- Must-have: Hands-on experience with Synopsys ICC2 and/or Cadence Innovus; familiarity with Tempus/PTSI or equivalent timing signoff tools.
- Must-have: Practical knowledge of clocking architectures, PDN design, DRC/LVS, CTS and power optimization techniques.
- Must-have: Scripting skills (Tcl/Perl) and ability to automate flows.
- Must-have: Good communication, teamwork, and problem-solving skills; experience meeting project milestones.
- Nice-to-have: Experience specifically with GPU core implementations, formal verification flows, and working in the latest process nodes.
- Nice-to-have: Experience making PPA trade-offs for high-performance cores.
Education Requirements
Bachelor's, Master's or PhD in Computer Engineering, Computer Science, Electrical/Electronic Engineering or a related technical field, or equivalent practical experience. The posting specifies combinations such as Bachelor's + ~2 years, Master's + ~1 year, or PhD; other lines reference Bachelor's/Master's with 3+ years for physical design roles.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
