Senior Physical Design Engineer

Job Title

Senior Physical Design Engineer

Role Summary

Senior physical design engineer on the mixed-signal design team responsible for implementing next-generation NVLINK and other high-performance SOC partitions. The role focuses on floorplanning, place-and-route, timing closure, power and clock planning, and physical verification for advanced process nodes.

This position influences products across NVIDIA's graphics, autonomous, and AI infrastructure lines.

Experience Level

Senior-level. Minimum ~5+ years of professional experience in VLSI physical design implementation, with hands-on RTL-to-GDS flow experience on advanced nodes.

Responsibilities

The core responsibilities include delivery of physical implementation and timing closure for high-performance, low-power SOC partitions.

• Develop and own STA and design constraints for advanced technology nodes.
• Debug timing violations and implement functional and timing ECOs; perform netlist formal verification.
• Floorplanning and place-and-route (P&R) of high-performance chip partitions.
• Power grid planning, clock tree synthesis (CTS), and timing closure across modes and corners.
• Perform RC extraction, crosstalk, IR drop and EM analysis to support timing and reliability goals.
• Execute physical verification tasks including ERC, DRC, and LVS.
• Assist in design-flow development and tool/debugging to improve productivity and quality.

Requirements

Must-have technical skills and experience for successful performance in this role.

• Minimum 5+ years of hands-on VLSI physical design implementation on 16nm, 7nm, 5nm or 3nm technology nodes.
• Proven RTL-to-GDS experience and ownership of full physical implementation steps (floorplan → P&R → signoff).
• Deep experience with STA, timing closure, CTS, power grid planning, IR drop analysis, and physical verification.
• Strong user-level experience with major EDA P&R, timing, and verification tools (examples: Synopsys, Cadence tool families and equivalent tools).
• Strong analytical and debugging skills; able to triage failures and produce robust fixes.
• Nice-to-have: scripting proficiency (Python, Perl, Tcl, Make) to automate flows and debugging.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering (BSEE / MSEE) or equivalent practical experience.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.