Senior Member of Technical Staff — Design Rule Enablement Team (TPG)

Job Title

Senior Member of Technical Staff — Design Rule Enablement Team (TPG)

Role Summary

Lead Design Enablement for DRAM technologies, coordinating cross-functional teams to develop and optimize design rules, requirements, and test structures from early development through manufacturing. Drive layout schedule milestones, ensure manufacturability, and align design rules across nodes.

Work closely with Design, Product Engineering, Process Integration, Advanced Mask Design, and Quality teams to optimize performance, power, area, and cost (PPAC) for Micron DRAM products. For application assistance or accommodations contact hrsupport_japan@micron.com.

Experience Level

Senior — requires extensive industry experience; minimum 15+ years in the semiconductor industry as specified.

Responsibilities

Primary responsibilities include defining and executing design rule strategies, coordinating schedules, and ensuring layout manufacturability across DRAM generations.

• Lead development and refinement of design rules, requirements, and test structures for DRAM and associated advanced CMOS nodes.
• Define project and sub-milestones within layout schedules and coordinate teams to meet targets and timelines.
• Manage test structure design, evaluation, and characterization to quantify process margins for next-generation devices.
• Address process window and die-size issues arising from database layout techniques and propose mitigations.
• Ensure robust Design Rule Checks (DRC) and define appropriate responses to deviations.
• Document and communicate complex problem resolutions and drive cross-node design rule alignment.
• Implement design rules within APR workflows to improve layout efficiency and manufacturability.
• Develop and integrate AI/LLM-compatible workflows and GenAI techniques to improve efficiency.

Requirements

Must-have technical skills and experience. Nice-to-have items noted where applicable.

• 15+ years of semiconductor industry experience in areas such as Process Integration, PDK development, Yield Enhancement, Product Engineering, Design, Test Structure Development, or Unit Process Development (experience requirement; degree details are in Education Requirements).
• Deep understanding of semiconductor process flow and key DRAM and advanced CMOS components (sense amp, word-line driver, etc.).
• Experience with test structure design and characterization.
• Familiarity with Cadence and Siemens toolsets and ability to perform layout tasks.
• Proven track record resolving complex technical issues and communicating clearly under pressure.
• Experience interacting with CAD groups, data post-processing, and database/reticle data transfer.
• Ability to prioritize and partner across Design, Process Integration, Advanced Mask Design, Scribe & Frame, Layout & Design to deliver solutions.
• Nice to have: hands-on experience with advanced device architectures (GAA, FinFET) and broad exposure to multiple DRAM generations.

Education Requirements

MS or PhD in Electrical Engineering, Microelectronics, Physics, or a related technical field (specified).

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.