Senior Mask Layout Design Engineer
NVIDIAJob Title
Senior Mask Layout Design Engineer
Role Summary
The Senior Mask Layout Design Engineer will be responsible for high-speed mixed-signal circuit designs, performing physical layouts using advanced CMOS technologies.
Experience Level
Senior - Minimum 5+ years of relevant mask design/layout experience.
Responsibilities
The role includes the following key responsibilities:
- Perform physical layout for mixed-signal functions such as PLLs, high-speed I/O circuits, and ESD structures using Cadence tools.
- Collaborate with ASIC and mixed-signal engineers on designs for VLSI products.
- Engage in floor planning, custom layout, and verification against design rules and schematics.
Requirements
The following qualifications are required:
- BSEE or equivalent experience.
- Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
- Expertise in Cadence custom circuit design tools, particularly Virtuoso.
- Experience with DRC and LVS verification tools such as Dracula, Hercules, Calibre, and Primeyield.
- Proficiency in scripting languages including Perl, Python, and Skill.
- Good communication skills in spoken and written English.
Education Requirements
BSEE or equivalent experience required.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
