Senior Manager - SOC Verification

Job Title

Senior Manager - SOC Verification

Role Summary

Senior engineering manager in the dsPIC Microcontroller Business Unit responsible for functional verification of next-generation 32-bit MCU system-on-chips. Lead verification strategy and execution across ARM and proprietary cores, coordinate global verification activities, and mentor verification engineers.

Accountable for verification planning, RTL and gate-level sign-off activities, formal analysis, and integration with STA and validation teams. Travel expectation: 0–25%.

Experience Level

Senior — the posting specifies 10+ years of SoC verification experience.

Responsibilities

Key responsibilities include leading verification for MCU SoCs and delivering verification quality and schedules.

• Lead design verification of complex digital macros and full-chip SoC verification from architectural descriptions.
• Define and implement verification strategy using UVM/SystemVerilog (and VMM where applicable).
• Develop and maintain testbenches, functional assertions, coverpoints, and coverage-driven verification metrics.
• Perform RTL and gate-level verification; analyze GLS results and resolve timing issues with STA.
• Develop functional safety tests, perform fault-injection simulations, and drive coverage analysis.
• Debug complex system-level issues and coordinate resolution across design, STA, and validation teams.
• Mentor and train junior verification engineers; promote automation and advanced verification techniques.
• Collaborate with analog/mixed-signal teams for AMS verification when required.

Requirements

Minimum technical requirements and domain expertise.

• 10+ years of hands-on SoC verification experience.
• Expert-level SystemVerilog and UVM (Universal Verification Methodology).
• Strong experience with Static Timing Analysis (STA) and gate-level simulation debugging.
• Experience verifying microcontrollers and peripherals (DMA, timers, ADC/DAC, security modules, functional-safety-related features).
• Direct experience verifying SoCs with ARM Cortex-M cores and RISC-based proprietary processors.
• Experience with formal verification (property and connectivity checking) using tools such as JasperGold or VC Formal.
• Deep knowledge of AMBA protocols (AHB, APB, AXI) and managing large regression suites.
• Experience defining module-level verification plans, TB plans, and integrating module TBs into full-chip environments.

Preferred / nice-to-have:

• Gate-level simulation and power-aware verification experience.
• Post-silicon validation experience and alignment of pre-silicon test plans with customer validation.
• Analog mixed-signal (AMS) simulation experience.
• Familiarity with functional safety standards such as ISO 26262.

Education Requirements

Bachelor of Engineering (BE) in Electronics/Electrical or Computer Science. The posting specifies strong digital design fundamentals. No other degrees, certifications, or explicit "equivalent experience" language were listed.

About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.