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Senior Manager, Design

Micron Technology
August 16, 2026
Full-time
On-site
Hyderabad, Telangana, India
Verification Jobs, Level - Senior

Job Title

Senior Manager, Design

Role Summary

Lead full-chip functional verification for Micron's non-volatile memory (NAND) design projects, owning verification planning, testbench development, model creation, and coverage closure. Collaborate with design and application teams to ensure functional correctness and delivery toward tape-out.

Drive verification methodology improvements and introduce automation or AI-assisted solutions to improve verification efficiency and quality.

Experience Level

Senior β€” typically 7–15 years of verification and design verification experience as stated in the minimum qualifications.

Responsibilities

The manager will lead verification activities, mentor engineers, and coordinate cross-functional debugging and model development.

  • Define verification plans and full-chip functional verification strategies for NAND/Flash designs.
  • Design and implement SystemVerilog/UVM testbenches, assertions, and coverage models.
  • Develop and maintain NAND Flash behavioral models in SystemVerilog and provide technical support to model users.
  • Run directed and constrained-random tests; identify corner cases and write relevant cover points.
  • Analyze coverage data, close verification holes, and report progress toward tape-out.
  • Collaborate with digital design, application engineering, and cross-functional teams to debug and deliver functionally accurate designs.
  • Drive verification methodology improvements and introduce automation or AI-assisted tools to improve efficiency.
  • Mentor and guide verification engineers; lead efforts to build complex UVM environments from scratch.

Requirements

Must-have skills and experience required for this role.

  • 7–15 years of experience developing verification collateral using Verilog, SystemVerilog, and UVM.
  • Proven proficiency with UVM and experience building complex, coverage-driven random/constrained UVM environments from scratch.
  • Strong knowledge of SystemVerilog assertions, coverage-driven methodology, and SystemVerilog OOP.
  • Experience in testbench development, directed and constrained-random verification, and coverage closure.
  • Deep understanding of circuit design, digital logic, and logic verification methodology.
  • Proficiency in C++ and scripting languages such as TCL and PERL.
  • Experience developing behavioral models for memory devices and providing technical support to model users is desirable.
  • Experience applying automation or AI to verification workflows is a plus.

Education Requirements

MS or BS degree in Electrical Engineering or Computer Engineering (or equivalent practical experience). The posting states "or equivalent" experience is acceptable.


About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.

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Date Posted: 2026-08-14