Senior Lead Engineer - Design and Architecture

Job Title

Senior Lead Engineer - Design and Architecture

Role Summary

Lead technical architecture and design for high-performance SoC/ASIC and platform subsystems across Altera's programmable device portfolio. Act as a hands-on individual contributor who defines complex interconnect, memory, and compute/networking subsystems and drives execution from concept through production silicon.

Work cross-functionally with architecture, RTL design, verification, physical design, software, and post-silicon teams to deliver scalable and manufacturable solutions for AI, cloud, networking, and edge applications.

Experience Level

Senior - requires extensive senior-level experience; the role specifies 15+ years of semiconductor, ASIC, SoC, or FPGA product development experience.

Responsibilities

Architect and drive design for complex silicon and platform subsystems; ensure architecture intent through implementation and validation.

• Define system, subsystem, and microarchitecture for SoC/ASIC and FPGA-adjacent platforms, focused on interconnect, data movement, memory hierarchy, and scalable compute or networking subsystems.
• Lead architecture exploration and make tradeoffs across performance, power, area, bandwidth, latency, reliability, scalability, cost, and schedule.
• Create architectural specifications, performance models, and implementation plans aligned across hardware, firmware, software, validation, and product teams.
• Own architecture and design decisions through concept, microarchitecture, RTL, integration, verification, emulation, implementation, bring-up, performance debug, and production readiness.
• Provide hands-on technical leadership for on-chip networks, routing/arbitration, flow control, coherency mechanisms, memory subsystems, and high-speed interfaces.
• Drive cross-functional resolution of complex technical issues using data and rigorous analysis to close architectural or execution risks.
• Establish and improve scalable design/verification methodologies, automation, and quality practices to increase engineering velocity and first-pass silicon success.
• Mentor senior engineers and technical leads; influence engineering direction across teams and product generations.
• Engage with IP, EDA, and foundry partners to inform architecture, implementation strategy, and roadmap planning.

Requirements

Must-have technical skills and experience required to perform the role.

• 15+ years of experience in semiconductor, ASIC, SoC, or FPGA product development, with demonstrated delivery of complex silicon architectures from concept through production.
• Deep expertise in one or more areas: on-chip networks, coherent/non-coherent interconnect, memory hierarchy, cache coherency, high-performance networking datapaths, packet processing, or infrastructure-class SoC design.
• Strong understanding of tradeoffs involving bandwidth, latency, congestion, throughput, power, area, timing, and reliability.
• Experience across the silicon development lifecycle with design, verification, emulation, physical design, DFT, firmware/software, and post-silicon teams.
• Proven technical leadership: ability to drive complex cross-functional decisions, resolve ambiguous problems, and influence teams without direct authority.

Nice-to-have:

• Experience delivering advanced-node, high-complexity SoCs/ASICs for networking, cloud, AI/ML, communications, storage, security, or data-center infrastructure.
• Experience architecting scalable Network-on-Chip or fabric solutions, including topology, routing, arbitration, QoS, traffic management, and credit-based flow control.
• Experience with memory systems, cache hierarchy, coherency protocols, HBM/DDR integration, or high-bandwidth data movement.
• Working knowledge of RTL and verification methodologies (SystemVerilog, simulation, formal, emulation), and familiarity with synthesis, static timing, and implementation flows.
• Experience with architecture modeling, performance analysis, Python-based automation, or AI-assisted engineering workflows.
• Experience with programmable logic devices, heterogeneous SoC platforms, or integration of hard and soft IP across product generations; record of technical innovation (patents/publications) preferred.

Education Requirements

Required: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field plus 15+ years of relevant experience. Preferred: Master’s degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.