Senior Layout Designer - Pathfinding

Job Title

Senior Layout Designer - Pathfinding

Role Summary

Develop and prepare multi-dimensional layouts and detailed drawings for semiconductor devices based on schematics and geometry from design engineering. Lead major block developments, verify data integrity, and coordinate with cross-functional teams including technology development, design, verification, and CAD across global sites.

Expect to improve layout efficiency through automation and new methodologies, mentor junior designers, and deliver quality-controlled results on schedule.

Experience Level

Senior level. Typically requires a minimum of 5 years of direct semiconductor layout design experience; 10+ years preferred for advanced leadership roles.

Responsibilities

Accountable for leading layout delivery, mentoring, and process improvements in a distributed design environment.

• Plan and deliver major blocks and product revisions; lead technical execution and quality control.
• Organize and prioritize logistics and resource allocation to meet schedules and resolve issues proactively.
• Assign resources, schedule tasks, and provide direction to achieve deliverables.
• Develop automation and new methodologies to improve layout efficiency and throughput.
• Collaborate with globally distributed teams (TD, design, verification, CAD) to coordinate implementation and verification.
• Mentor and train junior layout designers; contribute to group management and technical innovation.

Requirements

Must-have technical skills and experience required for successful performance in the role.

• Deep working knowledge of EDA tools such as Cadence Virtuoso, Synopsys, and Calibre.
• Strong physical verification analysis and debugging skills.
• Proven ability to debug problems via root-cause analysis and collaborate with engineering teams to implement solutions.
• Skilled in custom layout techniques including floor-planning, signal planning, and power planning methodologies.
• In-depth understanding of design rules and producing manufacturable, high-quality layouts.
• Strong verbal and written communication skills.

Nice-to-have:

• Project leadership experience in quality optimization and die size reduction.
• IC layout experience with NAND, DRAM and/or SRAM.
• Programming skills and experience leveraging AI to augment layout workflows.
• 10+ years of direct layout experience for senior technical leadership.

Education Requirements

Minimum: AS or Bachelor's degree in Electronics, Electrical Engineering, or a related technical field plus 5 years of direct semiconductor layout design experience. Preferred: BS degree in a related field; 10+ years of direct layout experience is preferred for senior roles.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.