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Senior Layout Design Engineer

Synopsys
August 22, 2026
Full-time
On-site
Da Nang, VN
Physical Design Jobs, Level - Senior

Job Title

Senior Layout Design Engineer

Role Summary

Design custom memory and standard-cell layouts for advanced FinFET nodes, focusing on performance, power, area, and manufacturability. Work within a global engineering team to deliver production-quality layout IP and support bring-up and characterization.

Experience Level

Senior. The posting specifies 2+ years of hands-on experience in custom layout, standard cell, or memory layout design.

Responsibilities

Translate circuit schematics into physical layout and ensure layouts meet electrical and reliability targets.

  • Design custom layouts for memory and standard-cell IP using Custom Compiler.
  • Run and debug physical verification flows (ICV, Calibre or similar) and resolve DRC, LVS, and ERC violations.
  • Analyze parasitics and perform EMIR/EM checks to meet electrical and reliability requirements.
  • Collaborate with circuit designers to preserve device sizing, matching, and electrical intent in the layout.
  • Build reusable layout cells that integrate cleanly into larger IP blocks (hierarchy, pin placement, routing consistency).
  • Support post-silicon bring-up and characterization by investigating layout-related issues.

Requirements

Must-have technical skills and experience.

  • 2+ years of hands-on custom layout, standard-cell, or memory layout design experience.
  • Proficiency with Custom Compiler and physical verification tools such as ICV or Calibre.
  • Strong DRC, LVS, and ERC debugging skills and the ability to trace root causes to layout or netlist.
  • Knowledge of MOSFET and FinFET device behavior, P-N junctions, resistors, capacitors, antenna effects, and EMIR analysis.
  • Experience with parasitic extraction and layout-for-reliability practices.
  • Clear communication skills for working with circuit designers, verification engineers, and process partners.
  • Nice-to-have: experience automating layout tasks or verification flows; familiarity with multiple process nodes.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-08-20