Senior Layout Design Engineer
Implement full-custom physical layout of SRAM memory macros in advanced semiconductor technology nodes. Work within a custom memory design team and collaborate closely with circuit designers, physical design engineers, and process teams to deliver manufacturable, optimized memory layouts.
Senior. The posting specifies 1+ years of hands-on SRAM/custom memory layout experience.
Primary responsibilities for this role include end-to-end SRAM layout implementation, verification, and collaboration with design and process stakeholders.
Must-have technical skills and tool experience required to perform the role.
Bachelor's or Master’s degree in Electrical Engineering, Electronics Engineering, Microelectronics or a closely related field is specified.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
