Senior IC Layout Designer

Job Title

Senior IC Layout Designer

Role Summary

The Senior IC Layout Designer is responsible for producing section-level (multi-hierarchical) IC layouts, coordinating with schematic designers and block layout resources, and ensuring schedule, design, and quality targets are met. This role includes allocating tasks, setting schedules, providing technical direction, and mentoring junior staff.

Experience Level

Senior-level. Requires significant hands-on layout experience; see Education Requirements for years of experience guidance.

Responsibilities

The role focuses on section-level layout delivery, design-for-manufacturability, and collaborating across a global design team.

• Create and deliver section- and block-level IC layouts to meet project schedules and quality standards.
• Perform floor-planning for large blocks and contribute to top/chip-level placement when needed.
• Interpret and act on LVS/DRC/ERC/ANTENNA/DENSITY/DFM verification results to fix layout issues.
• Apply standard layout practices including matching, parasitic control, noise isolation, supply routing, latch-up prevention, shielding, wells/substrates, and ESD considerations.
• Allocate tasks, set schedules, and provide direction to block layout resources; mentor new hires and interns.
• Improve layout processes, checklists, and documentation to minimize rework.
• Collaborate with cross-functional and global teams and communicate design status and issues clearly.

Requirements

Key technical and interpersonal requirements. Items labeled "Nice-to-have" are preferred but not mandatory.

• Must-have: Extensive section (multi-hierarchical) layout experience and strong fundamentals in layout principles, IC reliability, device physics, and failure mechanisms.
• Must-have: Strong skills in layout matching, parasitic awareness, noise isolation, supply considerations, and ESD-aware layout.
• Must-have: Ability to interpret LVS/DRC/ERC/ANTENNA/DENSITY/DFM reports and execute fixes.
• Must-have: Strong leadership, planning, organizational, and communication skills; ability to work effectively in cross-functional teams.
• Nice-to-have: Familiarity with Cadence Virtuoso XL and Calibre verification tools.
• Nice-to-have: Scripting experience (PERL or SKILL) and experience with ADC/DAC or high-voltage analog circuits.
• Nice-to-have: Top/chip-level layout experience and experience with older and advanced nodes (examples: 0.18 µm, 40 nm).
• Other: Willingness to travel up to approximately 10% of the time.

Education Requirements

BS in Electronics or Electrical Engineering. At least 4 years of relevant IC layout experience is required.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.