Senior Hardware Compute Architect (f/m/d)

Job Title

Senior Hardware Compute Architect

Role Summary

Lead the hardware architecture for a next-generation hybrid compute engine that integrates electronic compute with photonic communication. Own compute architecture, memory hierarchy, data fabric, and system interfaces to enable dynamic workload execution across domains.

Work with architecture, photonics, software, RTL, physical design, and packaging teams to translate workload requirements into an implementable system architecture balancing performance, power, area, and manufacturability.

Experience Level

Senior — typically 5+ years of relevant experience in compute/System-on-Chip architecture or system-level hardware architecture.

Responsibilities

Define and validate system-level hardware architecture for a hybrid electronic/photonic compute engine; translate requirements into implementable specifications.

• Specify execution units (scalar, vector, tensor/matrix), memory hierarchy, and memory tiering strategies.
• Architect the system data fabric and interconnect infrastructure (bandwidth, latency, coherency, die-to-die communication).
• Define hardware/software interfaces and workload-mapping strategies with software architects.
• Perform quantitative modeling and trade-off analysis for performance, power, area, and scalability prior to silicon implementation.
• Collaborate with photonics, circuit design, RTL, physical design, and packaging teams to produce implementable designs.
• Own architecture specifications through sign-off and ensure alignment with downstream implementation teams.

Requirements

Key technical skills and experience required; listed as must-have and nice-to-have.

• Must-have: 5+ years designing compute hardware architecture at SoC or system level, with deep expertise in execution units, workload mapping, memory hierarchy, and system-level trade-offs.
• Must-have: Experience architecting high-performance interconnects and data fabrics (UCIe, CXL, UALink, NVLink-class or comparable).
• Must-have: Demonstrated ability with architectural modeling and quantitative analysis of performance, power, area, and scalability.
• Must-have: Proven collaboration across hardware and software teams to define interfaces and system requirements.
• Must-have: Hands-on experience with architecture modeling/simulation tools and relevant languages (examples: Python, C++, SystemC) and workflows that produce implementable specs for RTL, physical design, and packaging teams.
• Nice-to-have: Familiarity with photonic/optical compute integration.
• Nice-to-have: Experience with heterogeneous compute platforms (GPUs, DPUs, FPGAs, custom AI accelerators).
• Nice-to-have: Contributions to industry interconnect standards (CXL Consortium, UALink, UCIe Consortium) or similar.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field — or equivalent practical experience.

About the Company

Company: Black Semiconductor

Headquarters: Aachen, Germany

Black Semiconductor is revolutionizing the semiconductor industry with innovative graphene solutions that enhance chip connectivity and efficiency. By merging electronic computing and photonic communication, the company aims to reshape how chips interact, driving significant advancements in power and speed. Their human-centered approach fosters collaboration and continuous learning, making it a dynamic place for professionals to grow and make an impact.