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Senior Frontend PHY IC Design Engineer (DSP focus)

Morse Micro
August 27, 2026
Full-time
On-site
Surry Hills, New South Wales, Australia
RTL Design Jobs, Level - Senior

Job Title

Senior Frontend PHY IC Design Engineer (DSP focus)

Role Summary

Design, integrate, verify and bring up an IEEE 802.11ah digital PHY for low-power Wi‑Fi SoCs. The role sits on the PHY team and works closely with systems, analog/RF and firmware groups to meet functional and performance targets through RTL, simulation and silicon bring-up.

Experience Level

Senior — posting requires 3+ years as a PHY IC Design Engineer; role expects proven independent technical ownership on complex PHY/DSP blocks.

Responsibilities

Primary responsibilities include architecture, RTL development, verification and silicon bring-up of the 802.11ah PHY.

  • Develop frontend PHY in Scala (Chisel), SystemVerilog and C.
  • Create and run functional verification in RTL simulators, SDF-annotated gate-level and AMS simulators using SystemVerilog, Verilog-A, MATLAB, C and Python.
  • Collaborate with Systems to optimise PHY/system performance.
  • Define and improve radio interface with Analog & RF teams.
  • Work with Firmware to develop embedded PHY firmware and support integration.
  • Assist with silicon bring-up, lab debug and PHY performance measurement.
  • Drive design towards manufacturability and high-volume production.

Requirements

Must-have technical skills and behaviors to be effective in the role.

  • Minimum 3+ years experience as a PHY IC Design Engineer.
  • Strong understanding of digital signal processing (DSP) with emphasis on hardware implementation.
  • Proven experience developing multiple DSP blocks within complex SoCs.
  • Familiarity with the IEEE 802.11 PHY layer, preferably 802.11ah.
  • Deep knowledge of digital design fundamentals, including low-power and multi-clock-domain design.
  • Practical experience with Cadence or Synopsys simulation tools.
  • Proficient in Linux development tools and scripting (make, shell scripts, Python).
  • Strong communication, teamwork, analytical skills and a practical, delivery-focused attitude.

Nice-to-have / Bonus

  • Experience performing PHY bring-up, silicon debug and performance measurement in the lab.
  • Familiarity with embedded processors (RISC-V a plus).
  • Experience with mixed-signal ASIC design and simulation.
  • Experience using git and full RTL-to-silicon debug/development flows.

Education Requirements

BSc, MSc or PhD in Electrical, Electronics or Communications Engineering, or Computer Science.


About the Company

Company: Morse Micro

Headquarters: Sydney, New South Wales, Australia

Morse Micro is an Australian fabless semiconductor company developing low-power Wi‑Fi HaLow (802.11ah) chips and SoCs for Internet of Things (IoT) applications, with global offices supporting design, silicon bring-up and production.

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Date Posted: 2026-08-27