Job Title
Senior FPGA Verification Engineer - UVM Architect
Role Summary
Lead the design and implementation of UVM/SystemVerilog verification environments for safety- and mission-critical FPGA designs. This is a hands-on technical leadership role that combines testbench architecture, verification strategy, and mentoring across programs.
Remote role (U.S.-based). U.S. Citizenship or Permanent Residency required; occasional travel.
Experience Level
Senior-level. Typical experience: 8β12+ years in FPGA or ASIC verification and leadership roles.
Responsibilities
Primary responsibilities include ownership of verification architecture, execution, and closure.
- Design and develop SystemVerilog/UVM verification environments for FPGA designs (agents, drivers, monitors, scoreboards, sequences).
- Define verification strategy, test plans, and coverage goals; drive functional, code, and assertion coverage closure.
- Create self-checking simulations using predictors and coverage-based testing.
- Support simulation and emulation workflows and debug complex issues across tools and platforms.
- Support DO-254 verification activities: requirements traceability, test evidence, and audits.
- Review and improve existing verification environments and processes; mentor and guide other engineers on best practices.
- Collaborate closely with design, systems, and program teams to ensure verification aligns with system requirements.
Requirements
Must-have technical skills and constraints are listed first; followed by desirable skills.
-
Must-have: 8+ years in FPGA or ASIC verification with proven leadership experience.
-
Must-have: Strong hands-on SystemVerilog and UVM experience; building reusable UVM testbenches and environments.
-
Must-have: Experience with simulation and debugging using tools such as QuestaSim, VCS, or equivalent; coverage-driven verification expertise.
-
Must-have: Practical understanding of RTL design and hardware interfaces; ability to create self-checking tests and predictors.
-
Must-have: Experience with DO-254 or other safety-critical standards and associated verification activities.
-
Must-have: U.S. Citizen or Permanent Resident (clearance requirement); role is U.S.-based remote.
-
Nice-to-have: Emulation experience (Siemens Veloce, Palladium), high-speed interfaces, DOORS or requirements-traceability tools.
-
Nice-to-have: Experience in aerospace/defense/regulatory environments and scripting with Python or similar for automation.
Education Requirements
Not specified.
About the Company
Company: Quest Defense Systems Solutions
Aerospace and defense engineering firm delivering mission-critical aerospace and defense systems, specializing in FPGA and safety-critical design and verification. With over 25 years of industry experience, Quest Defense Systems Solutions provides engineering, systems integration, and program support for regulated and mission-critical programs.

Date Posted: 2026-05-21