Senior FPGA Verification Engineer
CesiumAstroJob Title
Senior FPGA Verification Engineer
Role Summary
Senior engineer responsible for verification of FPGA designs for aerospace systems. Works within the FPGA engineering team to plan and execute verification activities, integrate with hardware and firmware teams, and support hardware bring-up.
Experience Level
Senior-level. The posting does not state explicit years of experience.
Responsibilities
Primary responsibilities typically associated with this role include:
- Develop and execute verification plans and testbenches for FPGA designs.
- Create and run simulation and regression suites; develop automated tests.
- Debug design issues in simulation and on lab hardware; support integration and bring-up.
- Collaborate with FPGA designers, firmware, and system engineers to close verification tasks.
- Document verification results and support design reviews.
Requirements
Key requirements and conditions identified in the posting:
- U.S. Person status or ability to obtain required export authorization (explicitly stated).
- On-site work in El Segundo, CA (role is listed as on-site).
- Completion of applicant authorization and proprietary information agreements; background checks and possible drug/alcohol testing may be required as a condition of employment.
- Specific technical skill details were not listed in the posting.
Education Requirements
The posting asks applicants to indicate their highest completed education level and explicitly lists: High School / GED; Associate's Degree; Bachelor's Degree; Master's Degree; Doctor of Philosophy (Ph.D.); Juris Doctor (J.D.). No specific field-of-study or explicit degree requirement was stated.
About the Company
Company: CesiumAstro
Headquarters: Melbourne, FL, United States
CesiumAstro develops turnkey RF communications and payload systems for satellites, UAVs, launch vehicles, and other space and airborne platforms, providing hardware and software solutions for space communications, signal processing, and on‑orbit data links.
