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Senior FPGA Engineer - Systems Team

Riverlane
August 27, 2026
Full-time
Remote friendly (Cambridge, ENG, United Kingdom)
Worldwide
£70,000 - £108,000 GBP yearly
FPGA Programming Jobs, Level - Senior

Job Title

Senior FPGA Engineer - Systems Team

Role Summary

Join Riverlane's Systems Engineering team as the technical interface to customers, integrating and adapting Deltaflow hardware to connect quantum control systems. The role focuses on delivering low-latency, high-throughput FPGA-based systems, troubleshooting deployed setups, and feeding customer insights back to product and engineering teams.

Salary: £70,000–£108,000 (DOE). Part-time applications will be considered.

Experience Level

Senior — typically 4–8 years of relevant FPGA or embedded systems experience, though Riverlane may consider varying levels of background and industry experience.

Responsibilities

Work directly with customers and internal teams to deploy, adapt and validate FPGA-based hardware in quantum control environments.

  • Lead technical workshops and evaluate customer control-system and data-communication requirements.
  • Integrate and deploy systems on-site; write RTL to match customer interfaces and ensure correct packet handling.
  • Design and run experiments with the Quantum Application Team; benchmark and characterise hardware latency and throughput.
  • Troubleshoot customer issues, produce debug scripts, and work with QA to replicate and resolve faults.
  • Update verification environments and test vectors based on experimental data.
  • Advocate customer needs to the product team and highlight trends affecting product direction.

Requirements

Must-have technical skills and professional experience.

  • Experience with modern FPGA platforms (examples: AMD/Xilinx MPSoCs/RFSoCs, Altera Stratix 7/10).
  • Proficient in SystemVerilog or VHDL; able to write and maintain RTL for customer interfaces.
  • Proven professional experience in at least one of: implementing classical decoders on FPGA (e.g. LDPC, turbo), implementing Ethernet/high-speed protocols, or designing custom protocols.
  • Practical experience with UVM-based verification environments and updating test vectors.
  • Good programming skills in Python and C++ for tooling, test automation and debugging.
  • Ability to convert product requirements into clear technical specifications and documentation.
  • Strong debugging skills, including scripting to trace faults and reproduce customer setups.
  • Excellent communication skills and ability to work independently and as part of a cross-disciplinary team.

Nice-to-have:

  • Experience working on scientific instrumentation.
  • Familiarity with quantum mechanics and quantum control systems.

Education Requirements

The posting lists a PhD in a relevant subject as a preferred qualification. No minimum degree (e.g. Bachelor's or Master's) or explicit "or equivalent experience" statement is specified elsewhere in the text.


About the Company

Company: Riverlane

Headquarters: Cambridge, UK

Riverlane develops quantum error correction (QEC) technology to enable fault-tolerant quantum computing. The Cambridge-based company builds hardware and software solutions and partners with quantum hardware providers and government agencies to accelerate R&D and deploy low-latency, high-throughput control systems for quantum experiments.

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Date Posted: 2026-08-26