Senior FPGA Engineer

Job Title

Senior FPGA Engineer

Role Summary

Design and implement complex FPGA subsystems for embedded, safety- and flight-critical robotics platforms. Work on RTL, integration with embedded processors, hardware bring-up, and verification to support avionics and robotics products.

The role is hands-on, on-site in Torrance, CA, and reports to engineering leadership within a small, cross-functional hardware and software team.

Experience Level

Senior. Posting requests a minimum of 3+ years of relevant FPGA/SoC experience; senior-level responsibilities include architecture, integration, and verification.

Responsibilities

Deliver FPGA hardware and firmware from architecture through bring-up and validation.

• Architect and implement FPGA subsystems: datapaths, memory hierarchies, interface logic, and register maps.
• Develop and maintain RTL/firmware for peripherals and converters (ADC/DAC) and interfaces (1 Gb+ Ethernet, PCIe, SPI, UART).
• Integrate FPGAs with embedded processors (ARM/RISC-V soft or hard cores) and define HW/SW interfaces.
• Create simulation testbenches, perform functional simulation and waveform analysis, and support timing closure across clock domains.
• Perform hardware-in-the-loop (HITL) testing, system bring-up, and debugging using oscilloscopes, logic analyzers, on-chip analyzers, and JTAG tools.
• Collaborate with PCB designers, software, and controls engineers to ensure signal integrity, pin planning, power, and system integration.

Requirements

Must-have technical skills, security, and logistical requirements for the role.

• U.S. citizenship required.
• 3+ years of practical FPGA/SoC engineering experience working on embedded systems.
• Proficient in VHDL and/or Verilog; strong preference for VHDL.
• Experience with AMD/Xilinx FPGAs and/or SoC FPGAs.
• Experience with high-speed interfaces (1 Gb+ Ethernet, PCIe) and serial protocols (SPI, UART).
• Familiarity with AXI bus protocols, DSP dataflow on FPGAs, and timing-closure techniques.
• Experience with EDA and debug tools such as GHDL, GTKWave, OpenOCD, and on-chip logic analyzers.
• Comfortable with Linux command-line tools and basic host management.
• Ability to work effectively in a small, fast-paced team and perform hands-on hardware bring-up.

Education Requirements

Minimum: Bachelor of Science in Electrical Engineering, Computer Engineering, or a related technical field (as stated). No explicit alternative "equivalent experience" language provided.

About the Company

Company: CHIRP Robotics

Headquarters: Torrance, CA, United States

CHIRP Robotics is a well-funded seed-stage startup based in Torrance, California, developing modular intelligence and autonomous systems for vehicles and other applications. Operating in stealth, the company holds hardware patents and software/algorithm IP and focuses on avionics-grade, flight-critical robotics platforms.