Job Title
Senior FPGA Engineer
Role Summary
Join MITRE's Electronic Systems Development team to design and prototype FPGA- and ASIC-based embedded systems for real-time communications, sensors, and high-throughput signal processing. Work includes hardware/software co-design, rapid prototyping on SoC/SDR platforms, and collaboration with multidisciplinary teams supporting government R&D.
Experience Level
Senior-level. Typically requires a minimum of 5 years of related experience or an equivalent combination of education and work experience.
Responsibilities
The role focuses on rapid development and delivery of prototype embedded platforms. Key responsibilities include:
- Design and develop FPGA and ASIC components for embedded systems.
- Implement algorithms in hardware and software (HW/SW co-design) and deploy on embedded SoC platforms.
- Integrate third-party IP and custom logic; perform synthesis, simulation, and verification.
- Support system-level integration, testing, and deployment on SDR and reconfigurable platforms.
- Produce design documentation, participate in design reviews, and collaborate with cross-disciplinary teams.
Requirements
Must-have skills, security, and location requirements; preferred items follow.
- Minimum of 5 years of related experience, or an equivalent combination of education and work experience.
- Proficiency in RTL languages (VHDL, Verilog/SystemVerilog) and experience with RTL synthesis and simulation tools.
- Experience implementing complex embedded systems and hardware/software integration.
- Familiarity with design, verification, test, and deployment best practices.
- Experience integrating third-party IP into custom designs.
- Strong programming foundation for embedded systems.
- Excellent oral and written communication skills.
- U.S. Citizenship required and ability to obtain and maintain a DoD Secret security clearance.
- Ability to be on-site a minimum of four days per week.
Nice-to-have:
- Experience with AMD Xilinx MPSoC/RFSoC/Versal or Intel Agilex SoC platforms.
- Experience across digital design phases, including synthesis, timing closure, place-and-route, and verification methodologies (UVM/OVM).
- Familiarity with EDA ASIC design flows and leading-edge foundries.
- Experience with scripting and build tools (TCL, Python, CMake) and MATLAB for signal processing.
- Exposure to hardware emulation platforms (Cadence Palladium, Siemens Veloce).
- Demonstrated technical leadership in FPGA design and verification.
Education Requirements
Degrees and academic expectations mentioned: Bachelor's, Master’s (M.S.), or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a similar technical field. The posting specifies typical combinations: approximately 5 years of related experience with a Bachelor's, 3 years with a Master's, or a Ph.D. with relevant experience; or an equivalent combination of education and work experience. M.S. or Ph.D. are noted as preferred for some roles.
About the Company
Company: MITRE
Headquarters: Bedford, Massachusetts, United States
MITRE is a not-for-profit organization dedicated to solving national challenges in defense, cybersecurity, healthcare, aviation, and more. By partnering with the government, MITRE operates R&D centers that develop innovative solutions for public interest. Known for its culture of innovation, it offers exceptional employee benefits, professional growth opportunities, and diversity initiatives to ensure a fulfilling workplace for its staff.

Date Posted: 2026-05-25