Senior FPGA Engineer

Job Title

Senior FPGA Engineer

Role Summary

Design and implement FPGA-based instrument systems for advanced quantum sensing products. Work with physicists, electronics and optical engineers to translate R&D prototypes into scalable commercial hardware.

This is an individual-contributor role focused on hands-on FPGA/SoC design, board bring-up, validation, and close collaboration across an interdisciplinary engineering team.

Experience Level

Senior — requires substantial prior FPGA engineering experience (see Requirements for specific years).

Responsibilities

Primary responsibilities include system-level FPGA/SoC design, board integration, verification, and test documentation.

• Define system requirements and select FPGA/SoC components and supporting ICs in collaboration with physicists and hardware teams.
• Contribute to custom PCB layouts integrating modern FPGA/SoC devices and identify layout risks affecting robustness.
• Develop synthesizable RTL (Verilog or VHDL), create test benches, and prepare EDA tool flows to meet performance targets.
• Lead FPGA board bring-up, integration, and validation; develop test scripts and compile validation documentation.
• Work with hardware and firmware engineers to ensure timing closure and system-level interoperability.

Requirements

Must-have skills, technologies, and constraints required for successful performance in this role.

• Minimum 5 years of relevant FPGA engineering experience (7+ years expected for candidates without an EE degree).
• Must meet U.S. export-control hiring criteria (U.S. citizens, lawful permanent residents, certain refugees/asylees).
• Proven ability to work effectively in laboratory environments; strong verbal and written communication skills.
• Expertise in HDL programming (synthesizable Verilog and/or VHDL) and verification practices.
• Experience with FPGAs and SoCs, with emphasis on AMD Zynq and AMD UltraScale+ families.
• Proficiency with EDA tools such as Vivado and Questa; experience scripting EDA tools (preferably TCL).
• Hands-on experience with lab test and measurement instruments (oscilloscopes, power supplies, pulse generators, logic/protocol analyzers).
• Experience writing timing constraints (SDC) and achieving timing closure on high-speed FPGA designs.
• Familiarity with common communication protocols (SPI, I2C, AXI, Avalon, Ethernet, AMBA, Wishbone).
• Understanding of practical RTL design issues: latency, jitter, metastability, setup/hold timing, and multicycle paths.
• Familiarity with revision control and issue tracking tools such as Git and Jira.

Nice-to-have / Preferred:

• Experience with formal verification methodologies and languages (PSL, SystemVerilog, UVM/OVM/UVVM).
• Embedded Linux on ARM platforms, U-Boot, device trees, and custom Linux builds (Yocto, PetaLinux, OpenEmbedded).
• Knowledge of hardware signal processing techniques and experience with CI/CD, virtualization, and deployment tooling.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or a related technical discipline is specified. The posting notes minimum experience expectations tied to degree: typically 5 years of relevant FPGA engineering experience for candidates with EE degrees, and 7+ years for candidates with other technical degrees. No certifications were specified.

About the Company

Company: Vector Atomic

Headquarters: Pleasanton, California, United States

Vector Atomic, an IonQ company, develops quantum sensing and quantum-enabled technologies for navigation, timing, geophysical exploration, and telecommunications. The company brings together engineers, scientists, and software developers to build hardware-integrated quantum sensor systems and advance prototypes toward commercial products.