Senior FPGA/ASIC Verification Engineer

Job Title

Senior FPGA/ASIC Verification Engineer

Role Summary

Senior-level verification engineer responsible for leading RTL verification and hardware verification activities for FPGA/ASIC projects. Works with the verification team to design testbenches, run simulations, and perform static analyses and timing checks.

The role includes technical leadership and process guidance for offshore and on-site engineers and involvement across the hardware lifecycle from requirements to place-and-route.

Experience Level

Senior — typically requires 5+ years of hands-on FPGA or ASIC development and verification experience.

Responsibilities

Primary responsibilities include RTL development, verification environment creation, hardware verification, and mentoring/coordination with offshore teams.

• Develop RTL and verification testbenches using VHDL, Verilog, and SystemVerilog.
• Build and maintain UVM constrained-random environments and simulation testbenches.
• Perform static timing analysis, linting, and clock-domain-crossing (CDC) analysis.
• Support hardware lifecycle activities: requirements capture, decomposition, architecture, synthesis, and place-and-route.
• Execute lab-based FPGA verification and hardware bring-up when required.
• Provide technical direction and process guidance to emerging engineers and offshore teams; communicate status and issues clearly.

Requirements

Must-have skills and experience listed first, followed by strong advantages.

• Must-have: Expert-level SystemVerilog and/or UVM verification experience, or equivalent FPGA verification experience in lab/design verification testing.
• Must-have: Substantial hands-on FPGA or ASIC development and verification experience (senior level, typically 5+ years).
• Must-have: Proven RTL design and testbench development using VHDL, Verilog, and SystemVerilog.
• Must-have: Experience with simulation flows, constrained-random verification, static timing analysis, linting, and CDC checks.
• Must-have: Experience with synthesis and place-and-route flows for FPGA/ASIC.
• Must-have: Strong communication skills and experience mentoring or guiding offshore engineering teams.
• Nice-to-have: Experience designing on Xilinx FPGA products.

Education Requirements

Degree in a STEM (Science, Technology, Engineering, Mathematics) field.

About the Company

Company: INFT Solutions

Provides engineering staffing and contract services for semiconductor and electronics companies, including design, verification, and test support such as DFT and ATPG expertise.