Senior Engineer — Post-Silicon Bring-Up

Job Title

Senior Engineer — Post-Silicon Bring-Up

Role Summary

The Senior Engineer will lead bring-up and performance optimizations for Cerebras's Wafer Scale Engine (WSE). The role works across chip design, system performance, software, and product teams to deliver deployable silicon validation and optimization for real-world AI workloads.

This is a hands-on engineering role focused on debugging, instrumentation, large-scale testing, and driving cross-functional delivery of silicon features into production processes.

Experience Level

Senior-level. The posting requests 7–10+ years of industry experience with 3–5 years in pre-silicon and post-silicon ASIC hardware work.

Responsibilities

Primary responsibilities include bring-up, instrumentation, and production-ready optimizations for wafer-scale silicon.

• Develop and debug flows that embed tested, deployable optimizations into production processes for Wafer Scale Engines.
• Refine AI system performance across hardware-software constraints (di/dt, V-F characterization, current and temperature limits).
• Build and enhance infrastructure for silicon validation with real-world workloads and large-scale automation.
• Create self-checking metrics and instrumentation for debug, coverage, and diagnostics.
• Collaborate with silicon architects, performance engineers, and software teams to improve WSE performance.
• Work across software, design, verification, emulation, and validation domains to optimize process and performance.
• Integrate with CI/CD, git workflows, and release flows to streamline testing and deployment.

Requirements

Must-have technical skills and experience. Preferred items listed after must-haves.

• 7–10+ years industry experience; experience in pre- and post-silicon ASIC validation (3–5 years specifically noted).
• Strong coding skills in Python and C; experience with Verilog/SystemVerilog.
• Good understanding of computer architecture and networking relevant to large-scale AI systems.
• Proficient in hardware/software codesign and layered system architectures.
• Excellent debugging, analytical, and problem-solving abilities.
• Experience with large-scale testing and automation (for example, pytest and Python-based frameworks).
• Familiarity with CI/CD tools, git, GitHub workflows, and Jenkins or equivalent build/release automation.
• Strong communication and collaboration skills; proven cross-functional delivery record.
• Nice-to-have: experience with AI/ML systems using large CPU core counts and communication fabrics, in-line testing and diagnostics, knowledge of chip defect profiles and mitigations, and experience building large-scale test and software infrastructure.

Education Requirements

BS/BE/B.Tech or MS/M.Tech in Electrical Engineering, ECE, Computer Science, or a related technical field — or equivalent practical work experience.

About the Company

Company: Cerebras

Headquarters: Sunnyvale, CA, USA

Developer of wafer-scale AI accelerators, Cerebras designs the Wafer Scale Engine (WSE)—one of the world’s largest AI chips—to deliver high-speed training and inference solutions for model labs, enterprises, and AI-native startups.