Senior Engineer, Physical Design Engineering

Job Title

Senior Engineer, Physical Design Engineering

Role Summary

Engineer responsible for physical implementation and sign-off of complex mixed-signal SoCs. Work with a cross-functional SoC team to deliver floorplanning, power planning, placement & routing, clock-tree synthesis, parasitic extraction and timing closure for high-speed designs.

Experience Level

Senior — typically 4–8 years of hands-on physical design/place-and-route experience on high-speed SoC projects.

Responsibilities

Primary responsibilities include end-to-end physical implementation and ensuring quality of results (QoR) and tapeout readiness.

• Lead floorplanning, power planning, placement and routing for complex mixed-signal SoCs.
• Perform clock planning and clock-tree synthesis (CTS) to meet high-speed timing requirements.
• Run parasitic extraction and support post-layout timing verification and sign-off.
• Develop and maintain STA constraints, perform static timing analysis, and drive timing closure.
• Drive tapeout activities and collaborate with foundry and backend teams for sign-off.
• Improve and innovate P&R flows to meet QoR and ensure predictability of results.
• Collaborate with architects, RTL designers, DFT/STA teams and verification to resolve implementation issues.

Requirements

Key technical skills and experience required or preferred.

• Must-have: Hands-on P&R sign-off experience for complex high-speed SoC designs in leading-edge process technologies (examples: 22 nm, 16 nm, 7 nm).
• Must-have: Experience with floorplanning, power planning, place & route, clock planning/CTS, parasitic extraction and STA/constraint development for sign-off.
• Must-have: Proven experience in handling tapeout of complex high-speed SoC designs.
• Must-have: Proficiency in scripting (TCL, Perl) to automate flows and debug issues.
• Must-have: Willingness to travel (~10%) and work standard day shift.
• Nice-to-have: Good understanding of device/interconnect and circuit aspects of advanced UDSM technologies.

Education Requirements

BTech or MTech degree in Electrical/Electronic Engineering from a recognized institute. The posting specifies 4–8 years of relevant physical design/place-and-route experience.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.