Job Title
Senior Engineer, Physical Design
Role Summary
Hands-on physical design engineer responsible for block-level place-and-route and methodology development for high-performance processor/ASIC chips in advanced CMOS nodes. Work with a global RTL, timing, power, and verification team to complete sign-off flows and improve design efficiency.
On-site position in Westborough, MA; relocation assistance available for qualified candidates. Reasonable accommodation requests may be directed to Marvell HR Helpdesk at TAOps@marvell.com.
Experience Level
Senior. The posting targets experienced engineers; no specific years-of-experience range was provided.
Responsibilities
Primary day-to-day duties and deliverables.
- Execute block-level synthesis and place-and-route flows to produce physical chip layout.
- Run and analyze static timing and timing-closure reports; troubleshoot timing issues.
- Perform power-integrity (EM/IR) and signal-integrity analysis and remediate issues.
- Review sign-off runs, identify errors, and implement fixes or optimizations to meet targets.
- Develop and maintain physical design methodology, scripts, and automation to improve flow robustness.
- Collaborate with RTL, verification, timing, and power teams across sites to meet performance and schedule goals.
- Mentor junior engineers and document best practices and flows.
Requirements
Must-have skills and desirable additions.
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Must-have: Proven experience in block-level physical design / P&R for advanced CMOS nodes (e.g., 7nm, 5nm, or below).
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Must-have: Hands-on experience with Cadence Genus and Innovus, and Synopsys Design Compiler and IC Compiler / Fusion Compiler.
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Must-have: Practical ability to run and interpret synthesis, P&R, and sign-off flows.
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Nice-to-have: Experience with static timing analysis tools (Tempus, PrimeTime) and EM/IR tools (Voltus, PrimeRail).
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Nice-to-have: Familiarity with physical verification and formal verification tools (Calibre, LEC, Formality).
- Strong troubleshooting, scripting, and automation mindset; willingness to learn and take on new challenges.
- Ability to work on-site at the designated team location (Westborough, MA).
Education Requirements
Bachelor's degree in Computer Science, Electrical Engineering, or a related technical field, or equivalent practical work experience.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-07-02