Senior Engineer, Memory Interface Circuits
The Senior Engineer will design and develop DDR/HBM Memory Interface I/O circuits that ensure optimal performance and reliability for next-generation high-performance chips. The role involves collaboration with various engineering teams to deliver robust designs and contribute to innovative semiconductor technology.
Mid-level, requiring 1-3 years of hands-on experience in CMOS circuit design.
The responsibilities include:
The ideal candidate will possess the following qualifications:
B.Tech/M.Tech degree in Electronics or Electrical Engineering.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
