Senior Engineer – Memory Compiler Flow Development

Job Title

Senior Engineer 6 Memory Compiler Flow Development

Role Summary

Develop and maintain EDA software and flows that generate physical views of embedded memories for advanced process nodes. Work within the Design Enablement team in the Physical IP Division, collaborating with IP design teams, SoC teams, and EDA vendors to define requirements and deliver industry-standard views.

Experience Level

Senior-level. The role expects 5+ years of relevant industry experience.

Responsibilities

Primary technical responsibilities for the role include:

• Design, implement, and maintain tools/flows for memory compiler development producing physical views (GDSII, LEF, NDM, CDL, etc.).
• Develop and maintain validation and test infrastructure for generated views using internal and external EDA tools and flows.
• Automate tool development, validation, and release workflows using scripting and software engineering practices.
• Collaborate with Physical IP designers, SoC teams, and EDA vendors to evaluate methodologies and define new requirements.
• Investigate and fix complex defects in tools and generated views; ensure correctness across signoff flows (LVS/DRC/extraction as applicable).
• Apply AI/LLM-assisted techniques to improve development productivity and automation where appropriate.

Requirements

Must-have technical skills and experience, and concise list of preferred extras.

• Must-have: Strong programming skills in C/C++, Java, Python, and shell scripting; ability to add features and diagnose/fix complex defects.
• Must-have: Solid software engineering practices: version control (Git/Gerrit or equivalent), unit/integration testing, CI, and test automation.
• Must-have: Familiarity with digital circuit design fundamentals and practical understanding of netlists and layout concepts.
• Must-have: Experience applying AI/LLM-driven techniques to assist software development and automation workflows.
• Must-have: Proven ability to work autonomously, learn new technologies quickly, and own technical deliverables.
• Nice-to-have: Experience with circuit/layout formats and tools (CDL, GDSII, LEF, Cadence DB, SKILL).
• Nice-to-have: Experience with memory compilers, tiling, netlist stitching, place and route, LVS/DRC, and extraction flows.
• Nice-to-have: Prior experience collaborating with geographically distributed teams.

Education Requirements

Bachelors or Masters degree, or equivalent experience, in Electronics, Electrical, Computer Engineering, Computer Science, or a related technical field.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.